From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Mateja Marjanovic" <mateja.marjanovic@rt-rk.com>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH] target/mips/translate: Simplify PCPYH using deposit/extract
Date: Tue, 24 Nov 2020 11:38:08 +0100 [thread overview]
Message-ID: <20201124103808.499948-1-f4bug@amsat.org> (raw)
Simplify (and optimize) the Parallel Copy Halfword
instruction using deposit() / extract() helpers.
Ref: C790-Specific Instruction Set, Appendix B-63.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/translate.c | 35 ++++++++++-------------------------
1 file changed, 10 insertions(+), 25 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index c64a1bc42e1..17a28557c2c 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -25220,34 +25220,19 @@ static void gen_mmi_pcpyh(DisasContext *ctx)
tcg_gen_movi_i64(cpu_mmr[rd], 0);
} else {
TCGv_i64 t0 = tcg_temp_new();
- TCGv_i64 t1 = tcg_temp_new();
- uint64_t mask = (1ULL << 16) - 1;
- tcg_gen_andi_i64(t0, cpu_gpr[rt], mask);
- tcg_gen_movi_i64(t1, 0);
- tcg_gen_or_i64(t1, t0, t1);
- tcg_gen_shli_i64(t0, t0, 16);
- tcg_gen_or_i64(t1, t0, t1);
- tcg_gen_shli_i64(t0, t0, 16);
- tcg_gen_or_i64(t1, t0, t1);
- tcg_gen_shli_i64(t0, t0, 16);
- tcg_gen_or_i64(t1, t0, t1);
+ tcg_gen_extract_i64(t0, cpu_gpr[a->rt], 0, 16);
+ tcg_gen_deposit_i64(cpu_gpr[a->rd], cpu_gpr[a->rd], t0, 0, 16);
+ tcg_gen_deposit_i64(cpu_gpr[a->rd], cpu_gpr[a->rd], t0, 16, 16);
+ tcg_gen_deposit_i64(cpu_gpr[a->rd], cpu_gpr[a->rd], t0, 32, 16);
+ tcg_gen_deposit_i64(cpu_gpr[a->rd], cpu_gpr[a->rd], t0, 48, 16);
- tcg_gen_mov_i64(cpu_gpr[rd], t1);
+ tcg_gen_extract_i64(t0, cpu_gpr_hi[a->rt], 0, 16);
+ tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rd], t0, 0, 16);
+ tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rd], t0, 16, 16);
+ tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rd], t0, 32, 16);
+ tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rd], t0, 48, 16);
- tcg_gen_andi_i64(t0, cpu_mmr[rt], mask);
- tcg_gen_movi_i64(t1, 0);
- tcg_gen_or_i64(t1, t0, t1);
- tcg_gen_shli_i64(t0, t0, 16);
- tcg_gen_or_i64(t1, t0, t1);
- tcg_gen_shli_i64(t0, t0, 16);
- tcg_gen_or_i64(t1, t0, t1);
- tcg_gen_shli_i64(t0, t0, 16);
- tcg_gen_or_i64(t1, t0, t1);
-
- tcg_gen_mov_i64(cpu_mmr[rd], t1);
-
- tcg_temp_free(t0);
tcg_temp_free(t1);
}
}
--
2.26.2
next reply other threads:[~2020-11-24 10:39 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-24 10:38 Philippe Mathieu-Daudé [this message]
2020-11-24 17:28 ` [PATCH] target/mips/translate: Simplify PCPYH using deposit/extract Richard Henderson
2020-11-24 17:40 ` Richard Henderson
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