From: Alexander Graf <agraf@csgraf.de>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Eduardo Habkost <ehabkost@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Cameron Esfahani <dirty@apple.com>,
Roman Bolshakov <r.bolshakov@yadro.com>,
qemu-arm@nongnu.org, Frank Yang <lfy@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Peter Collingbourne <pcc@google.com>
Subject: [PATCH v3 08/10] arm/hvf: Add a WFI handler
Date: Wed, 2 Dec 2020 20:04:06 +0100 [thread overview]
Message-ID: <20201202190408.2041-9-agraf@csgraf.de> (raw)
In-Reply-To: <20201202190408.2041-1-agraf@csgraf.de>
From: Peter Collingbourne <pcc@google.com>
Sleep on WFI until the VTIMER is due but allow ourselves to be woken
up on IPI.
Signed-off-by: Peter Collingbourne <pcc@google.com>
[agraf: Remove unused 'set' variable, always advance PC on WFX trap]
Signed-off-by: Alexander Graf <agraf@csgraf.de>
---
accel/hvf/hvf-cpus.c | 5 ++--
include/sysemu/hvf_int.h | 1 +
target/arm/hvf/hvf.c | 55 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 58 insertions(+), 3 deletions(-)
diff --git a/accel/hvf/hvf-cpus.c b/accel/hvf/hvf-cpus.c
index e613c22ad0..a981ccde70 100644
--- a/accel/hvf/hvf-cpus.c
+++ b/accel/hvf/hvf-cpus.c
@@ -337,15 +337,14 @@ static int hvf_init_vcpu(CPUState *cpu)
cpu->hvf = g_malloc0(sizeof(*cpu->hvf));
/* init cpu signals */
- sigset_t set;
struct sigaction sigact;
memset(&sigact, 0, sizeof(sigact));
sigact.sa_handler = dummy_signal;
sigaction(SIG_IPI, &sigact, NULL);
- pthread_sigmask(SIG_BLOCK, NULL, &set);
- sigdelset(&set, SIG_IPI);
+ pthread_sigmask(SIG_BLOCK, NULL, &cpu->hvf->unblock_ipi_mask);
+ sigdelset(&cpu->hvf->unblock_ipi_mask, SIG_IPI);
#ifdef __aarch64__
r = hv_vcpu_create(&cpu->hvf->fd, (hv_vcpu_exit_t **)&cpu->hvf->exit, NULL);
diff --git a/include/sysemu/hvf_int.h b/include/sysemu/hvf_int.h
index 5f15119184..13adf6ea77 100644
--- a/include/sysemu/hvf_int.h
+++ b/include/sysemu/hvf_int.h
@@ -62,6 +62,7 @@ extern HVFState *hvf_state;
struct hvf_vcpu_state {
uint64_t fd;
void *exit;
+ sigset_t unblock_ipi_mask;
};
void assert_hvf_ok(hv_return_t ret);
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 5ecce36d4a..79aeeb237b 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -2,6 +2,7 @@
* QEMU Hypervisor.framework support for Apple Silicon
* Copyright 2020 Alexander Graf <agraf@csgraf.de>
+ * Copyright 2020 Google LLC
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -18,6 +19,7 @@
#include "sysemu/hw_accel.h"
#include <Hypervisor/Hypervisor.h>
+#include <mach/mach_time.h>
#include "exec/address-spaces.h"
#include "hw/irq.h"
@@ -413,6 +415,7 @@ int hvf_arch_init_vcpu(CPUState *cpu)
void hvf_kick_vcpu_thread(CPUState *cpu)
{
+ cpus_kick_thread(cpu);
hv_vcpus_exit(&cpu->hvf->fd, 1);
}
@@ -468,6 +471,18 @@ static int hvf_inject_interrupts(CPUState *cpu)
return 0;
}
+static void hvf_wait_for_ipi(CPUState *cpu, struct timespec *ts)
+{
+ /*
+ * Use pselect to sleep so that other threads can IPI us while we're
+ * sleeping.
+ */
+ qatomic_mb_set(&cpu->thread_kicked, false);
+ qemu_mutex_unlock_iothread();
+ pselect(0, 0, 0, 0, ts, &cpu->hvf->unblock_ipi_mask);
+ qemu_mutex_lock_iothread();
+}
+
int hvf_vcpu_exec(CPUState *cpu)
{
ARMCPU *arm_cpu = ARM_CPU(cpu);
@@ -579,6 +594,46 @@ int hvf_vcpu_exec(CPUState *cpu)
}
case EC_WFX_TRAP:
advance_pc = true;
+ if (!(syndrome & WFX_IS_WFE) && !(cpu->interrupt_request &
+ (CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIQ))) {
+
+ uint64_t ctl;
+ r = hv_vcpu_get_sys_reg(cpu->hvf->fd, HV_SYS_REG_CNTV_CTL_EL0,
+ &ctl);
+ assert_hvf_ok(r);
+
+ if (!(ctl & 1) || (ctl & 2)) {
+ /* Timer disabled or masked, just wait for an IPI. */
+ hvf_wait_for_ipi(cpu, NULL);
+ break;
+ }
+
+ uint64_t cval;
+ r = hv_vcpu_get_sys_reg(cpu->hvf->fd, HV_SYS_REG_CNTV_CVAL_EL0,
+ &cval);
+ assert_hvf_ok(r);
+
+ int64_t ticks_to_sleep = cval - mach_absolute_time();
+ if (ticks_to_sleep < 0) {
+ break;
+ }
+
+ uint64_t seconds = ticks_to_sleep / arm_cpu->gt_cntfrq_hz;
+ uint64_t nanos =
+ (ticks_to_sleep - arm_cpu->gt_cntfrq_hz * seconds) *
+ 1000000000 / arm_cpu->gt_cntfrq_hz;
+
+ /*
+ * Don't sleep for less than 2ms. This is believed to improve
+ * latency of message passing workloads.
+ */
+ if (!seconds && nanos < 2000000) {
+ break;
+ }
+
+ struct timespec ts = { seconds, nanos };
+ hvf_wait_for_ipi(cpu, &ts);
+ }
break;
case EC_AA64_HVC:
cpu_synchronize_state(cpu);
--
2.24.3 (Apple Git-128)
next prev parent reply other threads:[~2020-12-02 19:15 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-02 19:03 [PATCH v3 00/10] hvf: Implement Apple Silicon Support Alexander Graf
2020-12-02 19:03 ` [PATCH v3 01/10] hvf: Add hypervisor entitlement to output binaries Alexander Graf
2020-12-02 23:32 ` Roman Bolshakov
2020-12-02 19:04 ` [PATCH v3 02/10] hvf: Move common code out Alexander Graf
2020-12-03 0:20 ` Roman Bolshakov
2020-12-02 19:04 ` [PATCH v3 03/10] hvf: Introduce hvf vcpu struct Alexander Graf
2020-12-03 0:41 ` Roman Bolshakov
2020-12-02 19:04 ` [PATCH v3 04/10] arm: Set PSCI to 0.2 for HVF Alexander Graf
2020-12-03 1:03 ` Roman Bolshakov
2020-12-02 19:04 ` [PATCH v3 05/10] hvf: arm: Mark CPU as dirty on reset Alexander Graf
2020-12-03 1:52 ` Roman Bolshakov
2020-12-03 10:55 ` Alexander Graf
2020-12-03 13:02 ` Roman Bolshakov
2020-12-03 14:13 ` Alexander Graf
2020-12-02 19:04 ` [PATCH v3 06/10] hvf: Add Apple Silicon support Alexander Graf
2020-12-03 5:21 ` Roman Bolshakov
2020-12-03 14:26 ` Alexander Graf
2020-12-02 19:04 ` [PATCH v3 07/10] arm: Add Hypervisor.framework build target Alexander Graf
2020-12-03 5:25 ` Roman Bolshakov
2020-12-02 19:04 ` Alexander Graf [this message]
2020-12-03 10:39 ` [PATCH v3 08/10] arm/hvf: Add a WFI handler Roman Bolshakov
2020-12-03 18:18 ` Peter Collingbourne
2020-12-04 18:15 ` Roman Bolshakov
2020-12-02 19:04 ` [PATCH v3 09/10] hvf: arm: Add support for GICv3 Alexander Graf
2020-12-02 19:04 ` [PATCH v3 10/10] hvf: arm: Implement -cpu host Alexander Graf
2020-12-02 19:27 ` [PATCH v3 00/10] hvf: Implement Apple Silicon Support no-reply
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