From: Andrew Melnychenko <andrew@daynix.com>
To: mst@redhat.com
Cc: intel-wired-lan@lists.osuosl.org, qemu-devel@nongnu.org,
alexander.duyck@gmail.com
Subject: [PATCH v4 1/2] hw/virtio-pci Added counter for pcie capabilities offsets.
Date: Thu, 3 Dec 2020 15:25:16 +0200 [thread overview]
Message-ID: <20201203132517.220811-2-andrew@daynix.com> (raw)
In-Reply-To: <20201203132517.220811-1-andrew@daynix.com>
From: Andrew <andrew@daynix.com>
Removed hardcoded offset for ats. Added cap offset counter
for future capabilities like AER.
Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
---
hw/virtio/virtio-pci.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 36524a5728..ceaa233129 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1798,6 +1798,7 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
if (pcie_port && pci_is_express(pci_dev)) {
int pos;
+ uint16_t last_pcie_cap_offset = PCI_CONFIG_SPACE_SIZE;
pos = pcie_endpoint_cap_init(pci_dev, 0);
assert(pos > 0);
@@ -1833,7 +1834,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
}
if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
- pcie_ats_init(pci_dev, 256);
+ pcie_ats_init(pci_dev, last_pcie_cap_offset);
+ last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF;
}
if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
--
2.29.2
next prev parent reply other threads:[~2020-12-03 13:00 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-03 13:25 [PATCH v4 0/2] hw/virtio-pci: AER capability Andrew Melnychenko
2020-12-03 13:25 ` Andrew Melnychenko [this message]
2020-12-03 13:25 ` [PATCH v4 2/2] hw/virtio-pci Added " Andrew Melnychenko
2020-12-03 21:57 ` Michael S. Tsirkin
-- strict thread matches above, loose matches on Subject: below --
2020-12-03 11:07 [PATCH v4 0/2] hw/virtio-pci: " andrew
2020-12-03 11:07 ` [PATCH v4 1/2] hw/virtio-pci Added counter for pcie capabilities offsets andrew
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