From: Francisco Iglesias <frasse.iglesias@gmail.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: Kevin Wolf <kwolf@redhat.com>,
Alistair Francis <alistair@alistair23.me>,
Qemu-block <qemu-block@nongnu.org>,
Bin Meng <bin.meng@windriver.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Max Reitz <mreitz@redhat.com>,
Alistair Francis <alistair23@gmail.com>
Subject: Re: [PATCH] hw/block: m25p80: Fix fast read for SST flashes
Date: Fri, 4 Dec 2020 10:46:54 +0000 [thread overview]
Message-ID: <20201204104652.GA16865@fralle-dell> (raw)
In-Reply-To: <CAEUhbmVkF9W12o04JnYofLLWwTfnNBJDnC+_8iZvdgnyonMYag@mail.gmail.com>
Hello Bin,
On [2020 Dec 04] Fri 15:52:12, Bin Meng wrote:
> Hi Francisco,
>
> On Thu, Dec 3, 2020 at 4:38 PM Francisco Iglesias
> <frasse.iglesias@gmail.com> wrote:
> >
> > Hi Bin and Alistair,
> >
> > On [2020 Dec 02] Wed 11:40:11, Alistair Francis wrote:
> > > On Sun, Nov 29, 2020 at 6:55 PM Bin Meng <bmeng.cn@gmail.com> wrote:
> > > >
> > > > From: Bin Meng <bin.meng@windriver.com>
> > > >
> > > > SST flashes require a dummy byte after the address bits.
> > > >
> > > > Signed-off-by: Bin Meng <bin.meng@windriver.com>
> > >
> > > I couldn't find a datasheet that says this... But the actual code
> > > change looks fine, so:
> > >
> > > Acked-by: Alistair Francis <alistair.francis@wdc.com>
> > >
> > > Alistair
> > >
> > > > ---
> > > >
> > > > hw/block/m25p80.c | 3 +++
> > > > 1 file changed, 3 insertions(+)
> > > >
> > > > diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
> > > > index 483925f..9b36762 100644
> > > > --- a/hw/block/m25p80.c
> > > > +++ b/hw/block/m25p80.c
> > > > @@ -825,6 +825,9 @@ static void decode_fast_read_cmd(Flash *s)
> > > > s->needed_bytes = get_addr_length(s);
> > > > switch (get_man(s)) {
> > > > /* Dummy cycles - modeled with bytes writes instead of bits */
> > > > + case MAN_SST:
> > > > + s->needed_bytes += 1;
> >
> > 1 dummy clk cycle is modelled as 1 byte write (see the comment above), so 1
> > dummy byte (8 dummy clk cycles) will need +8 above.
>
> I think you were confused by the WINBOND codes. The comments are
> correct. It is modeled with bytes instead of bits, so we should +=1.
What the comment says is (perhaps not superclear) that 1 dummy clock cycle
is modeled as one 1 byte write into the flash (meaining that 8 byte writes
are needed for 1 dummy byte). Perhaps it is easier to understand
looking into how the controllers issue the command towards the flash model
(for example the xilinx_spips), the start of the FAST_READ cmd is issued
as writing the following into the flash: 1 byte (cmd), 3 bytes (address),
8 bytes (8 dummy cycles -> 1 dummy byte).
Best regards,
Francisco Iglesias
>
> > An option could be to fall
> > through to the Windbond case below instead (since it seems to operate
> > likewise).
> >
> > Best regards,
> > Francisco Iglesias
> >
> >
> > > > + break;
> > > > case MAN_WINBOND:
> > > > s->needed_bytes += 8;
>
> Actually this is wrong. This should be corrected to +=1. I will
> prepare a patch for it.
>
> > > > break;
> > > > --
>
> Regards,
> Bin
next prev parent reply other threads:[~2020-12-04 10:48 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-30 2:50 [PATCH] hw/block: m25p80: Fix fast read for SST flashes Bin Meng
2020-12-02 19:40 ` Alistair Francis
2020-12-02 23:09 ` Bin Meng
2020-12-02 23:14 ` Alistair Francis
2020-12-03 8:38 ` Francisco Iglesias
2020-12-04 7:52 ` Bin Meng
2020-12-04 10:46 ` Francisco Iglesias [this message]
2020-12-04 10:52 ` Bin Meng
2020-12-04 11:28 ` Francisco Iglesias
2020-12-11 6:07 ` Bin Meng
2020-12-11 15:16 ` Francisco Iglesias
2020-12-11 15:29 ` Bin Meng
2020-12-11 16:11 ` Francisco Iglesias
2020-12-12 8:16 ` Bin Meng
2020-12-12 9:24 ` Francisco Iglesias
2020-12-12 9:44 ` Bin Meng
2020-12-15 16:40 ` Francisco Iglesias
2020-12-16 10:11 ` Bin Meng
2020-12-22 1:40 ` Bin Meng
2021-01-06 14:21 ` Bin Meng
2021-01-12 1:10 ` Bin Meng
2021-01-14 13:38 ` Bin Meng
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