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From: Stephane Duverger <stephane.duverger@free.fr>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: x86 TCG helpers clobbered registers
Date: Tue, 8 Dec 2020 23:39:52 +0100	[thread overview]
Message-ID: <20201208223952.GA36560@wise> (raw)
In-Reply-To: <4ee3b75a-c778-3cf5-2516-9c9290d96b44@linaro.org>

On Tue, Dec 08, 2020 at 03:18:54PM -0600, Richard Henderson wrote:
> As for modifying the fast path cases, the code is quite delicate,
> and you run into problems with live registers.  Which could be
> worked around in each backend, but... why?

Perhaps thinking that working at IR level would prevent these live
registers issues, seconded by the fact that vCPU TLBs handling seem to
be tcg-target agnostic.

But I do understand your position, have no patch suggesting a viable
alternative implementation, and most of all don't want to take more of
your time.

I appreciated the discussion and your help Richard. Thanks again.


      reply	other threads:[~2020-12-08 22:44 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-04 15:36 x86 TCG helpers clobbered registers Stephane Duverger
2020-12-04 19:35 ` Richard Henderson
2020-12-05  1:34   ` Stephane Duverger
2020-12-05 12:38     ` Richard Henderson
2020-12-07 10:10       ` Stephane Duverger
2020-12-08 21:18         ` Richard Henderson
2020-12-08 22:39           ` Stephane Duverger [this message]

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