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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 07/36] tests/qtest/npcm7xx_rng-test: dump random data on failure
Date: Thu, 10 Dec 2020 11:47:27 +0000	[thread overview]
Message-ID: <20201210114756.16501-8-peter.maydell@linaro.org> (raw)
In-Reply-To: <20201210114756.16501-1-peter.maydell@linaro.org>

From: Havard Skinnemoen <hskinnemoen@google.com>

Dump the collected random data after a randomness test failure.

Note that this relies on the test having called
g_test_set_nonfatal_assertions() so we don't abort immediately on the
assertion failure.

Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: minor commit message tweak]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 tests/qtest/npcm7xx_rng-test.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/tests/qtest/npcm7xx_rng-test.c b/tests/qtest/npcm7xx_rng-test.c
index c614968ffcd..797f832e53a 100644
--- a/tests/qtest/npcm7xx_rng-test.c
+++ b/tests/qtest/npcm7xx_rng-test.c
@@ -20,6 +20,7 @@
 
 #include "libqtest-single.h"
 #include "qemu/bitops.h"
+#include "qemu-common.h"
 
 #define RNG_BASE_ADDR   0xf000b000
 
@@ -36,6 +37,13 @@
 /* Number of bits to collect for randomness tests. */
 #define TEST_INPUT_BITS  (128)
 
+static void dump_buf_if_failed(const uint8_t *buf, size_t size)
+{
+    if (g_test_failed()) {
+        qemu_hexdump(stderr, "", buf, size);
+    }
+}
+
 static void rng_writeb(unsigned int offset, uint8_t value)
 {
     writeb(RNG_BASE_ADDR + offset, value);
@@ -188,6 +196,7 @@ static void test_continuous_monobit(void)
     }
 
     g_assert_cmpfloat(calc_monobit_p(buf, sizeof(buf)), >, 0.01);
+    dump_buf_if_failed(buf, sizeof(buf));
 }
 
 /*
@@ -209,6 +218,7 @@ static void test_continuous_runs(void)
     }
 
     g_assert_cmpfloat(calc_runs_p(buf.l, sizeof(buf) * BITS_PER_BYTE), >, 0.01);
+    dump_buf_if_failed(buf.c, sizeof(buf));
 }
 
 /*
@@ -230,6 +240,7 @@ static void test_first_byte_monobit(void)
     }
 
     g_assert_cmpfloat(calc_monobit_p(buf, sizeof(buf)), >, 0.01);
+    dump_buf_if_failed(buf, sizeof(buf));
 }
 
 /*
@@ -254,6 +265,7 @@ static void test_first_byte_runs(void)
     }
 
     g_assert_cmpfloat(calc_runs_p(buf.l, sizeof(buf) * BITS_PER_BYTE), >, 0.01);
+    dump_buf_if_failed(buf.c, sizeof(buf));
 }
 
 int main(int argc, char **argv)
-- 
2.20.1



  parent reply	other threads:[~2020-12-10 11:58 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-10 11:47 [PULL 00/36] target-arm queue Peter Maydell
2020-12-10 11:47 ` [PULL 01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding Peter Maydell
2020-12-10 11:47 ` [PULL 02/36] hw/net/can: Introduce Xilinx ZynqMP CAN controller Peter Maydell
2020-12-10 11:47 ` [PULL 03/36] xlnx-zynqmp: Connect Xilinx ZynqMP CAN controllers Peter Maydell
2020-12-10 11:47 ` [PULL 04/36] tests/qtest: Introduce tests for Xilinx ZynqMP CAN controller Peter Maydell
2020-12-10 11:47 ` [PULL 05/36] MAINTAINERS: Add maintainer entry " Peter Maydell
2020-12-10 11:47 ` [PULL 06/36] sbsa-ref: allow to use Cortex-A53/57/72 cpus Peter Maydell
2020-12-10 11:47 ` Peter Maydell [this message]
2020-12-10 11:47 ` [PULL 08/36] i.MX25: Fix bad printf format specifiers Peter Maydell
2020-12-10 11:47 ` [PULL 09/36] i.MX31: " Peter Maydell
2020-12-10 11:47 ` [PULL 10/36] i.MX6: " Peter Maydell
2020-12-10 11:47 ` [PULL 11/36] i.MX6ul: " Peter Maydell
2020-12-10 11:47 ` [PULL 12/36] hw/intc/armv7m_nvic: Make all of system PPB range be RAZWI/BusFault Peter Maydell
2020-12-10 11:47 ` [PULL 13/36] target/arm: Implement v8.1M PXN extension Peter Maydell
2020-12-10 11:47 ` [PULL 14/36] target/arm: Don't clobber ID_PFR1.Security on M-profile cores Peter Maydell
2020-12-10 11:47 ` [PULL 15/36] target/arm: Implement VSCCLRM insn Peter Maydell
2020-12-10 11:47 ` [PULL 16/36] target/arm: Implement CLRM instruction Peter Maydell
2020-12-10 11:47 ` [PULL 17/36] target/arm: Enforce M-profile VMRS/VMSR register restrictions Peter Maydell
2020-12-10 11:47 ` [PULL 18/36] target/arm: Refactor M-profile VMSR/VMRS handling Peter Maydell
2020-12-10 11:47 ` [PULL 19/36] target/arm: Move general-use constant expanders up in translate.c Peter Maydell
2020-12-10 11:47 ` [PULL 20/36] target/arm: Implement VLDR/VSTR system register Peter Maydell
2020-12-10 11:47 ` [PULL 21/36] target/arm: Implement M-profile FPSCR_nzcvqc Peter Maydell
2020-12-10 11:47 ` [PULL 22/36] target/arm: Use new FPCR_NZCV_MASK constant Peter Maydell
2020-12-10 11:47 ` [PULL 23/36] target/arm: Factor out preserve-fp-state from full_vfp_access_check() Peter Maydell
2020-12-10 11:47 ` [PULL 24/36] target/arm: Implement FPCXT_S fp system register Peter Maydell
2020-12-10 11:47 ` [PULL 25/36] hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1M Peter Maydell
2020-12-10 11:47 ` [PULL 26/36] target/arm: For v8.1M, always clear R0-R3, R12, APSR, EPSR on exception entry Peter Maydell
2020-12-10 11:47 ` [PULL 27/36] target/arm: In v8.1M, don't set HFSR.FORCED on vector table fetch failures Peter Maydell
2020-12-10 11:47 ` [PULL 28/36] target/arm: Implement v8.1M REVIDR register Peter Maydell
2020-12-10 11:47 ` [PULL 29/36] target/arm: Implement new v8.1M NOCP check for exception return Peter Maydell
2020-12-10 11:47 ` [PULL 30/36] target/arm: Implement new v8.1M VLLDM and VLSTM encodings Peter Maydell
2020-12-10 11:47 ` [PULL 31/36] hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bit Peter Maydell
2020-12-10 11:47 ` [PULL 32/36] target/arm: Implement CCR_S.TRD behaviour for SG insns Peter Maydell
2020-12-10 11:47 ` [PULL 33/36] hw/intc/armv7m_nvic: Fix "return from inactive handler" check Peter Maydell
2020-12-10 11:47 ` [PULL 34/36] target/arm: Implement M-profile "minimal RAS implementation" Peter Maydell
2020-12-10 11:47 ` [PULL 35/36] hw/intc/armv7m_nvic: Implement read/write for RAS register block Peter Maydell
2020-12-10 11:47 ` [PULL 36/36] hw/arm/armv7m: Correct typo in QOM object name Peter Maydell
2020-12-10 12:51 ` [PULL 00/36] target-arm queue Peter Maydell

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