From: Gerd Hoffmann <kraxel@redhat.com>
To: qemu-devel@nongnu.org
Cc: Eduardo Habkost <ehabkost@redhat.com>,
Sergio Lopez <slp@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Gerd Hoffmann <kraxel@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Igor Mammedov <imammedo@redhat.com>
Subject: [PULL 04/11] microvm: make pcie irq base runtime changeable
Date: Thu, 10 Dec 2020 13:13:52 +0100 [thread overview]
Message-ID: <20201210121359.18320-5-kraxel@redhat.com> (raw)
In-Reply-To: <20201210121359.18320-1-kraxel@redhat.com>
Allows to move them in case we have enough
irq lines available.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Sergio Lopez <slp@redhat.com>
Message-id: 20201203105423.10431-6-kraxel@redhat.com
---
include/hw/i386/microvm.h | 2 +-
hw/i386/microvm.c | 11 ++++++-----
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/include/hw/i386/microvm.h b/include/hw/i386/microvm.h
index c5d60bacb5e8..f1e9db059b85 100644
--- a/include/hw/i386/microvm.h
+++ b/include/hw/i386/microvm.h
@@ -66,7 +66,6 @@
#define PCIE_MMIO_SIZE 0x20000000
#define PCIE_ECAM_BASE 0xe0000000
#define PCIE_ECAM_SIZE 0x10000000
-#define PCIE_IRQ_BASE 12
/* Machine type options */
#define MICROVM_MACHINE_PIT "pit"
@@ -96,6 +95,7 @@ struct MicrovmMachineState {
bool auto_kernel_cmdline;
/* Machine state */
+ uint32_t pcie_irq_base;
uint32_t virtio_irq_base;
uint32_t virtio_num_transports;
bool kernel_cmdline_fixed;
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
index e92f236bf442..5e4182b47464 100644
--- a/hw/i386/microvm.c
+++ b/hw/i386/microvm.c
@@ -181,6 +181,7 @@ static void microvm_devices_init(MicrovmMachineState *mms)
mms->virtio_irq_base = 5;
mms->virtio_num_transports = 8;
if (x86_machine_is_acpi_enabled(x86ms)) {
+ mms->pcie_irq_base = 12;
mms->virtio_irq_base = 16;
}
@@ -226,12 +227,12 @@ static void microvm_devices_init(MicrovmMachineState *mms)
mms->gpex.mmio32.size = PCIE_MMIO_SIZE;
mms->gpex.ecam.base = PCIE_ECAM_BASE;
mms->gpex.ecam.size = PCIE_ECAM_SIZE;
- mms->gpex.irq = PCIE_IRQ_BASE;
+ mms->gpex.irq = mms->pcie_irq_base;
create_gpex(mms);
- x86ms->pci_irq_mask = ((1 << (PCIE_IRQ_BASE + 0)) |
- (1 << (PCIE_IRQ_BASE + 1)) |
- (1 << (PCIE_IRQ_BASE + 2)) |
- (1 << (PCIE_IRQ_BASE + 3)));
+ x86ms->pci_irq_mask = ((1 << (mms->pcie_irq_base + 0)) |
+ (1 << (mms->pcie_irq_base + 1)) |
+ (1 << (mms->pcie_irq_base + 2)) |
+ (1 << (mms->pcie_irq_base + 3)));
} else {
x86ms->pci_irq_mask = 0;
}
--
2.27.0
next prev parent reply other threads:[~2020-12-10 13:11 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-10 12:13 [PULL 00/11] Microvm 20201210 patches Gerd Hoffmann
2020-12-10 12:13 ` [PULL 01/11] x86: rewrite gsi_handler() Gerd Hoffmann
2020-12-10 12:13 ` [PULL 02/11] x86: add support for second ioapic Gerd Hoffmann
2020-12-10 12:13 ` [PULL 03/11] microvm: make number of virtio transports runtime changeable Gerd Hoffmann
2020-12-10 12:13 ` Gerd Hoffmann [this message]
2020-12-10 12:13 ` [PULL 05/11] microvm: drop microvm_gsi_handler() Gerd Hoffmann
2020-12-10 12:13 ` [PULL 06/11] microvm: add second ioapic Gerd Hoffmann
2020-12-10 12:13 ` [PULL 07/11] tests/acpi: allow updates for expected data files Gerd Hoffmann
2020-12-10 12:13 ` [PULL 08/11] tests/acpi: add data files for ioapic2 test variant Gerd Hoffmann
2020-12-10 12:13 ` [PULL 09/11] tests/acpi: add ioapic2=on test for microvm Gerd Hoffmann
2020-12-10 12:13 ` [PULL 10/11] tests/acpi: update expected data files Gerd Hoffmann
2020-12-10 12:13 ` [PULL 11/11] tests/acpi: disallow updates for " Gerd Hoffmann
2020-12-10 14:26 ` [PULL 00/11] Microvm 20201210 patches Peter Maydell
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