From: "Cédric Le Goater" <clg@kaod.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Andrew Jeffery" <andrew@aj.id.au>,
"Cédric Le Goater" <clg@kaod.org>,
qemu-arm@nongnu.org, "Joel Stanley" <joel@jms.id.au>,
qemu-devel@nongnu.org
Subject: [PULL 3/5] ast2600: SRAM is 89KB
Date: Thu, 10 Dec 2020 13:51:13 +0100 [thread overview]
Message-ID: <20201210125115.1812083-4-clg@kaod.org> (raw)
In-Reply-To: <20201210125115.1812083-1-clg@kaod.org>
From: Joel Stanley <joel@jms.id.au>
On the AST2600A1, the SRAM size was increased to 89KB.
Fixes: 7582591ae745 ("aspeed: Support AST2600A1 silicon revision")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20201112012113.835858-1-joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/arm/aspeed_ast2600.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 1450bde7cf26..12e4a16d3765 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -481,7 +481,7 @@ static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data)
sc->name = "ast2600-a1";
sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
sc->silicon_rev = AST2600_A1_SILICON_REV;
- sc->sram_size = 0x10000;
+ sc->sram_size = 0x16400;
sc->spis_num = 2;
sc->ehcis_num = 2;
sc->wdts_num = 4;
--
2.26.2
next prev parent reply other threads:[~2020-12-10 13:19 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-10 12:51 [PULL 0/5] aspeed queue Cédric Le Goater
2020-12-10 12:51 ` [PULL 1/5] hw/misc: add an EMC141{3,4} device model Cédric Le Goater
2020-12-10 12:51 ` [PULL 2/5] aspeed: Add support for the g220a-bmc board Cédric Le Goater
2020-12-10 12:51 ` Cédric Le Goater [this message]
2020-12-10 12:51 ` [PULL 4/5] aspeed/smc: Add support for address lane disablement Cédric Le Goater
2020-12-10 12:51 ` [PULL 5/5] aspeed: g220a-bmc: Add an FRU Cédric Le Goater
2020-12-10 15:59 ` [PULL 0/5] aspeed queue Peter Maydell
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