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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id d8sm16306001wmb.11.2020.12.11.16.15.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Dec 2020 16:15:49 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PATCH 8/8] hw/ppc: Remove unused ppcuic_init() Date: Sat, 12 Dec 2020 00:15:37 +0000 Message-Id: <20201212001537.24520-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201212001537.24520-1-peter.maydell@linaro.org> References: <20201212001537.24520-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x343.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E. Iglesias" , qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Now we've converted all the callsites to directly create the QOM UIC device themselves, the ppcuic_init() function is unused and can be removed. The enum defining PPCUIC symbolic constants can be moved to the ppc-uic.h header where it more naturally belongs. Signed-off-by: Peter Maydell --- include/hw/intc/ppc-uic.h | 7 +++++++ include/hw/ppc/ppc4xx.h | 9 --------- hw/ppc/ppc4xx_devs.c | 38 -------------------------------------- 3 files changed, 7 insertions(+), 47 deletions(-) diff --git a/include/hw/intc/ppc-uic.h b/include/hw/intc/ppc-uic.h index e614e2ffd80..22dd5e5ac2c 100644 --- a/include/hw/intc/ppc-uic.h +++ b/include/hw/intc/ppc-uic.h @@ -47,6 +47,13 @@ OBJECT_DECLARE_SIMPLE_TYPE(PPCUIC, PPC_UIC) #define UIC_MAX_IRQ 32 +/* Symbolic constants for the sysbus IRQ outputs */ +enum { + PPCUIC_OUTPUT_INT = 0, + PPCUIC_OUTPUT_CINT = 1, + PPCUIC_OUTPUT_NB, +}; + struct PPCUIC { /*< private >*/ SysBusDevice parent_obj; diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h index cc19c8da5be..980f964b5a9 100644 --- a/include/hw/ppc/ppc4xx.h +++ b/include/hw/ppc/ppc4xx.h @@ -33,15 +33,6 @@ PowerPCCPU *ppc4xx_init(const char *cpu_model, clk_setup_t *cpu_clk, clk_setup_t *tb_clk, uint32_t sysclk); -/* PowerPC 4xx universal interrupt controller */ -enum { - PPCUIC_OUTPUT_INT = 0, - PPCUIC_OUTPUT_CINT = 1, - PPCUIC_OUTPUT_NB, -}; -qemu_irq *ppcuic_init (CPUPPCState *env, qemu_irq *irqs, - uint32_t dcr_base, int has_ssr, int has_vr); - void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks, MemoryRegion ram_memories[], hwaddr ram_bases[], hwaddr ram_sizes[], diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index ffe4cf43e88..fe9d4f7155e 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -77,44 +77,6 @@ PowerPCCPU *ppc4xx_init(const char *cpu_type, return cpu; } -/*****************************************************************************/ -/* "Universal" Interrupt controller */ - -qemu_irq *ppcuic_init (CPUPPCState *env, qemu_irq *irqs, - uint32_t dcr_base, int has_ssr, int has_vr) -{ - DeviceState *uicdev = qdev_new(TYPE_PPC_UIC); - SysBusDevice *uicsbd = SYS_BUS_DEVICE(uicdev); - qemu_irq *uic_irqs; - int i; - - qdev_prop_set_uint32(uicdev, "dcr-base", dcr_base); - qdev_prop_set_bit(uicdev, "use-vectors", has_vr); - object_property_set_link(OBJECT(uicdev), "cpu", OBJECT(env_cpu(env)), - &error_fatal); - sysbus_realize_and_unref(uicsbd, &error_fatal); - - sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT, irqs[PPCUIC_OUTPUT_INT]); - sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT, irqs[PPCUIC_OUTPUT_CINT]); - - /* - * Return an allocated array of the UIC's input IRQ lines. - * This is an ugly temporary API to retain compatibility with - * the ppcuic_init() interface from the pre-QOM-conversion UIC. - * None of the callers free this array, so it is leaked -- but - * so was the array allocated by qemu_allocate_irqs() in the - * old code. - * - * The callers should just instantiate the UIC and wire it up - * themselves rather than passing qemu_irq* in and out of this function. - */ - uic_irqs = g_new0(qemu_irq, UIC_MAX_IRQ); - for (i = 0; i < UIC_MAX_IRQ; i++) { - uic_irqs[i] = qdev_get_gpio_in(uicdev, i); - } - return uic_irqs; -} - /*****************************************************************************/ /* SDRAM controller */ typedef struct ppc4xx_sdram_t ppc4xx_sdram_t; -- 2.20.1