From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Paul Burton" <paulburton@kernel.org>,
kvm@vger.kernel.org, "Huacai Chen" <chenhuacai@kernel.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PULL 20/26] hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit()
Date: Sun, 13 Dec 2020 21:19:40 +0100 [thread overview]
Message-ID: <20201213201946.236123-21-f4bug@amsat.org> (raw)
In-Reply-To: <20201213201946.236123-1-f4bug@amsat.org>
PTC field has 8 bits, PVPE has 4. We plan to use the
"hw/registerfields.h" API with MIPS CPU definitions
(target/mips/cpu.h). Meanwhile we use magic 8 and 4.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201204222622.2743175-6-f4bug@amsat.org>
---
hw/mips/malta.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index f06cb90a44a..366f4fdfcde 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
+#include "qemu/bitops.h"
#include "qemu-common.h"
#include "qemu/datadir.h"
#include "cpu.h"
@@ -1136,8 +1137,11 @@ static void malta_mips_config(MIPSCPU *cpu)
CPUState *cs = CPU(cpu);
if (ase_mt_available(env)) {
- env->mvp->CP0_MVPConf0 |= ((smp_cpus - 1) << CP0MVPC0_PVPE) |
- ((smp_cpus * cs->nr_threads - 1) << CP0MVPC0_PTC);
+ env->mvp->CP0_MVPConf0 = deposit32(env->mvp->CP0_MVPConf0,
+ CP0MVPC0_PTC, 8,
+ smp_cpus * cs->nr_threads - 1);
+ env->mvp->CP0_MVPConf0 = deposit32(env->mvp->CP0_MVPConf0,
+ CP0MVPC0_PVPE, 4, smp_cpus - 1);
}
}
--
2.26.2
next prev parent reply other threads:[~2020-12-13 20:32 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-13 20:19 [PULL 00/26] MIPS patches for 2020-12-13 Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 01/26] MAINTAINERS: chenhc@lemote.com -> chenhuacai@kernel.org Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 02/26] target/mips/kvm: Assert unreachable code is not used Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 03/26] target/mips/kvm: Remove unused headers Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 04/26] target/mips: Include "exec/memattrs.h" in 'internal.h' Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 05/26] target/mips: Replace magic values by CP0PM_MASK or TARGET_PAGE_BITS_MIN Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 06/26] target/mips: Do not include CP0 helpers in user-mode emulation Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 07/26] target/mips: Remove unused headers from cp0_helper.c Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 08/26] target/mips: Also display exception names in user-mode Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 09/26] target/mips: Allow executing MSA instructions on Loongson-3A4000 Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 10/26] target/mips: Explicit Release 6 MMU types Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 11/26] target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT() Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 12/26] target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 13/26] hw/mips: Move address translation helpers to target/mips/ Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 14/26] target/mips: Remove unused headers from translate.c Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 15/26] target/mips: Remove unused headers from op_helper.c Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 16/26] target/mips: Remove mips_def_t unused argument from mvp_init() Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 17/26] target/mips: Introduce ase_mt_available() helper Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 18/26] target/mips: Do not initialize MT registers if MT ASE absent Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 19/26] hw/mips/malta: " Philippe Mathieu-Daudé
2020-12-13 20:19 ` Philippe Mathieu-Daudé [this message]
2020-12-13 20:19 ` [PULL 21/26] target/mips: Extract cpu_supports*/cpu_set* translate.c Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 22/26] target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 23/26] target/mips: Move cpu definitions, reset() and realize() " Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 24/26] target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn() Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 25/26] target/mips: Remove unused headers from fpu_helper.c Philippe Mathieu-Daudé
2020-12-13 20:19 ` [PULL 26/26] target/mips: Use FloatRoundMode enum for FCR31 modes conversion Philippe Mathieu-Daudé
2020-12-14 20:32 ` [PULL 00/26] MIPS patches for 2020-12-13 Peter Maydell
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