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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH v4 40/43] tcg/arm: Support split-wx code generation
Date: Mon, 14 Dec 2020 08:03:11 -0600	[thread overview]
Message-ID: <20201214140314.18544-41-richard.henderson@linaro.org> (raw)
In-Reply-To: <20201214140314.18544-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/arm/tcg-target.h     |  2 +-
 tcg/arm/tcg-target.c.inc | 37 +++++++++++++++++++++----------------
 2 files changed, 22 insertions(+), 17 deletions(-)

diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 7e04755428..856d6dd4b0 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -141,6 +141,6 @@ void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t);
 #define TCG_TARGET_NEED_LDST_LABELS
 #endif
 #define TCG_TARGET_NEED_POOL_LABELS
-#define TCG_TARGET_SUPPORT_MIRROR       0
+#define TCG_TARGET_SUPPORT_MIRROR       1
 
 #endif
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index 9b9400f164..3d2717aeb0 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -187,29 +187,32 @@ static const uint8_t tcg_cond_to_arm_cond[] = {
     [TCG_COND_GTU] = COND_HI,
 };
 
-static inline bool reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
+static bool reloc_pc24(tcg_insn_unit *src_rw, const tcg_insn_unit *target)
 {
-    ptrdiff_t offset = (tcg_ptr_byte_diff(target, code_ptr) - 8) >> 2;
+    const tcg_insn_unit *src_rx = tcg_splitwx_to_rx(src_rw);
+    ptrdiff_t offset = (tcg_ptr_byte_diff(target, src_rx) - 8) >> 2;
+
     if (offset == sextract32(offset, 0, 24)) {
-        *code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff);
+        *src_rw = deposit32(*src_rw, 0, 24, offset);
         return true;
     }
     return false;
 }
 
-static inline bool reloc_pc13(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
+static bool reloc_pc13(tcg_insn_unit *src_rw, const tcg_insn_unit *target)
 {
-    ptrdiff_t offset = tcg_ptr_byte_diff(target, code_ptr) - 8;
+    const tcg_insn_unit *src_rx = tcg_splitwx_to_rx(src_rw);
+    ptrdiff_t offset = tcg_ptr_byte_diff(target, src_rx) - 8;
 
     if (offset >= -0xfff && offset <= 0xfff) {
-        tcg_insn_unit insn = *code_ptr;
+        tcg_insn_unit insn = *src_rw;
         bool u = (offset >= 0);
         if (!u) {
             offset = -offset;
         }
         insn = deposit32(insn, 23, 1, u);
         insn = deposit32(insn, 0, 12, offset);
-        *code_ptr = insn;
+        *src_rw = insn;
         return true;
     }
     return false;
@@ -221,9 +224,9 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
     tcg_debug_assert(addend == 0);
 
     if (type == R_ARM_PC24) {
-        return reloc_pc24(code_ptr, (tcg_insn_unit *)value);
+        return reloc_pc24(code_ptr, (const tcg_insn_unit *)value);
     } else if (type == R_ARM_PC13) {
-        return reloc_pc13(code_ptr, (tcg_insn_unit *)value);
+        return reloc_pc13(code_ptr, (const tcg_insn_unit *)value);
     } else {
         g_assert_not_reached();
     }
@@ -617,7 +620,7 @@ static void tcg_out_movi32(TCGContext *s, int cond, int rd, uint32_t arg)
 
     /* Check for a pc-relative address.  This will usually be the TB,
        or within the TB, which is immediately before the code block.  */
-    diff = arg - ((intptr_t)s->code_ptr + 8);
+    diff = tcg_pcrel_diff(s, (void *)arg) - 8;
     if (diff >= 0) {
         rot = encode_imm(diff);
         if (rot >= 0) {
@@ -1337,7 +1340,8 @@ static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOpIdx oi,
     label->datahi_reg = datahi;
     label->addrlo_reg = addrlo;
     label->addrhi_reg = addrhi;
-    label->raddr = raddr;
+    /* TODO: Cast goes away when all hosts converted */
+    label->raddr = (void *)tcg_splitwx_to_rx(raddr);
     label->label_ptr[0] = label_ptr;
 }
 
@@ -1348,7 +1352,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
     MemOp opc = get_memop(oi);
     void *func;
 
-    if (!reloc_pc24(lb->label_ptr[0], s->code_ptr)) {
+    if (!reloc_pc24(lb->label_ptr[0], tcg_splitwx_to_rx(s->code_ptr))) {
         return false;
     }
 
@@ -1411,7 +1415,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
     TCGMemOpIdx oi = lb->oi;
     MemOp opc = get_memop(oi);
 
-    if (!reloc_pc24(lb->label_ptr[0], s->code_ptr)) {
+    if (!reloc_pc24(lb->label_ptr[0], tcg_splitwx_to_rx(s->code_ptr))) {
         return false;
     }
 
@@ -1762,8 +1766,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
             TCGReg base = TCG_REG_PC;
 
             tcg_debug_assert(s->tb_jmp_insn_offset == 0);
-            ptr = (intptr_t)(s->tb_jmp_target_addr + args[0]);
-            dif = ptr - ((intptr_t)s->code_ptr + 8);
+            ptr = (intptr_t)tcg_splitwx_to_rx(s->tb_jmp_target_addr + args[0]);
+            dif = tcg_pcrel_diff(s, (void *)ptr) - 8;
             dil = sextract32(dif, 0, 12);
             if (dif != dil) {
                 /* The TB is close, but outside the 12 bits addressable by
@@ -2297,7 +2301,8 @@ static void tcg_target_qemu_prologue(TCGContext *s)
      * Return path for goto_ptr. Set return value to 0, a-la exit_tb,
      * and fall through to the rest of the epilogue.
      */
-    tcg_code_gen_epilogue = s->code_ptr;
+    /* TODO: Cast goes away when all hosts converted */
+    tcg_code_gen_epilogue = (void *)tcg_splitwx_to_rx(s->code_ptr);
     tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R0, 0);
     tcg_out_epilogue(s);
 }
-- 
2.25.1



  parent reply	other threads:[~2020-12-14 14:35 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-14 14:02 [PATCH v4 00/43] Mirror map JIT memory for TCG Richard Henderson
2020-12-14 14:02 ` [PATCH v4 01/43] tcg: Do not flush icache for interpreter Richard Henderson
2020-12-14 21:17   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 02/43] util: Extract flush_icache_range to cacheflush.c Richard Henderson
2020-12-14 21:59   ` Philippe Mathieu-Daudé
2020-12-15  1:41   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 03/43] util: Enhance flush_icache_range with separate data pointer Richard Henderson
2020-12-15  1:43   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 04/43] util: Specialize flush_idcache_range for aarch64 Richard Henderson
2020-12-15  1:46   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 05/43] tcg: Move tcg prologue pointer out of TCGContext Richard Henderson
2020-12-14 22:01   ` Philippe Mathieu-Daudé
2020-12-15  1:48   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 06/43] tcg: Move tcg epilogue " Richard Henderson
2020-12-15  1:54   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 07/43] tcg: Add in_code_gen_buffer Richard Henderson
2020-12-14 22:09   ` Philippe Mathieu-Daudé
2020-12-15 22:43     ` Richard Henderson
2020-12-15 23:15       ` Philippe Mathieu-Daudé
2020-12-14 14:02 ` [PATCH v4 08/43] tcg: Introduce tcg_splitwx_to_{rx,rw} Richard Henderson
2021-01-02 20:00   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 09/43] tcg: Adjust TCGLabel for const Richard Henderson
2021-01-02 20:01   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 10/43] tcg: Adjust tcg_out_call " Richard Henderson
2020-12-14 22:16   ` Philippe Mathieu-Daudé
2021-01-02 20:02   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 11/43] tcg: Adjust tcg_out_label " Richard Henderson
2020-12-14 22:18   ` Philippe Mathieu-Daudé
2021-01-02 20:03   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 12/43] tcg: Adjust tcg_register_jit " Richard Henderson
2021-01-02 20:03   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 13/43] tcg: Adjust tb_target_set_jmp_target for split-wx Richard Henderson
2021-01-02 20:05   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 14/43] tcg: Make DisasContextBase.tb const Richard Henderson
2020-12-14 22:14   ` Philippe Mathieu-Daudé
2021-01-02 20:05   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 15/43] tcg: Make tb arg to synchronize_from_tb const Richard Henderson
2020-12-14 22:15   ` Philippe Mathieu-Daudé
2021-01-02 20:06   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 16/43] tcg: Use Error with alloc_code_gen_buffer Richard Henderson
2021-01-02 20:09   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 17/43] tcg: Add --accel tcg,split-wx property Richard Henderson
2020-12-15  2:05   ` Joelle van Dyne
2020-12-15 22:50     ` Richard Henderson
2020-12-14 14:02 ` [PATCH v4 18/43] accel/tcg: Support split-wx for linux with memfd Richard Henderson
2021-01-02 20:11   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 19/43] accel/tcg: Support split-wx for darwin/iOS with vm_remap Richard Henderson
2021-01-05  6:02   ` Joelle van Dyne
2021-01-05 16:57     ` Richard Henderson
2020-12-14 14:02 ` [PATCH v4 20/43] tcg: Return the TB pointer from the rx region from exit_tb Richard Henderson
2021-01-02 20:14   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 21/43] tcg/i386: Support split-wx code generation Richard Henderson
2021-01-02 20:15   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 22/43] tcg/aarch64: Use B not BL for tcg_out_goto_long Richard Henderson
2021-01-02 20:15   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 23/43] tcg/aarch64: Support split-wx code generation Richard Henderson
2021-01-02 20:16   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 24/43] disas: Push const down through host disasassembly Richard Henderson
2020-12-14 22:13   ` Philippe Mathieu-Daudé
2021-01-02 20:18   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 25/43] tcg/tci: Push const down through bytecode reading Richard Henderson
2021-01-02 20:19   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 26/43] tcg: Introduce tcg_tbrel_diff Richard Henderson
2021-01-02 20:19   ` Joelle van Dyne
2020-12-14 14:02 ` [PATCH v4 27/43] tcg/ppc: Use tcg_tbrel_diff Richard Henderson
2020-12-14 14:02 ` [PATCH v4 28/43] tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB Richard Henderson
2020-12-14 14:03 ` [PATCH v4 29/43] tcg/ppc: Support split-wx code generation Richard Henderson
2020-12-14 14:03 ` [PATCH v4 30/43] tcg/sparc: Use tcg_tbrel_diff Richard Henderson
2020-12-14 14:03 ` [PATCH v4 31/43] tcg/sparc: Support split-wx code generation Richard Henderson
2020-12-14 14:03 ` [PATCH v4 32/43] tcg/s390: Use tcg_tbrel_diff Richard Henderson
2020-12-14 14:03 ` [PATCH v4 33/43] tcg/s390: Support split-wx code generation Richard Henderson
2020-12-14 14:03 ` [PATCH v4 34/43] tcg/riscv: Fix branch range checks Richard Henderson
2020-12-15 17:29   ` Alistair Francis
2020-12-14 14:03 ` [PATCH v4 35/43] tcg/riscv: Remove branch-over-branch fallback Richard Henderson
2020-12-15 17:30   ` Alistair Francis
2020-12-14 14:03 ` [PATCH v4 36/43] tcg/riscv: Support split-wx code generation Richard Henderson
2020-12-15 17:31   ` Alistair Francis
2020-12-14 14:03 ` [PATCH v4 37/43] accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd Richard Henderson
2020-12-14 14:03 ` [PATCH v4 38/43] tcg/mips: Do not assert on relocation overflow Richard Henderson
2020-12-14 14:03 ` [PATCH v4 39/43] tcg/mips: Support split-wx code generation Richard Henderson
2020-12-14 14:03 ` Richard Henderson [this message]
2020-12-14 14:03 ` [PATCH v4 41/43] tcg: Remove TCG_TARGET_SUPPORT_MIRROR Richard Henderson
2021-01-02 20:22   ` Joelle van Dyne
2020-12-14 14:03 ` [PATCH v4 42/43] tcg: Constify tcg_code_gen_epilogue Richard Henderson
2021-01-02 20:23   ` Joelle van Dyne
2020-12-14 14:03 ` [PATCH v4 43/43] tcg: Constify TCGLabelQemuLdst.raddr Richard Henderson
2021-01-02 20:24   ` Joelle van Dyne
2020-12-14 21:01 ` [PATCH v4 00/43] Mirror map JIT memory for TCG no-reply

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