From: Keith Packard via <qemu-devel@nongnu.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Keith Packard" <keithp@keithp.com>,
qemu-riscv@nongnu.org,
"Sagar Karandikar" <sagark@eecs.berkeley.edu>,
"Bastian Koppelmann" <kbastian@mail.uni-paderborn.de>,
"Laurent Vivier" <laurent@vivier.eu>,
qemu-arm@nongnu.org,
"Alistair Francis" <Alistair.Francis@wdc.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: [PATCH 0/9] Add RISC-V semihosting 0.2. Finish ARM semihosting 2.0
Date: Mon, 14 Dec 2020 12:07:04 -0800 [thread overview]
Message-ID: <20201214200713.3886611-1-keithp@keithp.com> (raw)
In-Reply-To: <87wnxktost.fsf@linaro.org>
This series adds support for RISC-V Semihosting, version 0.2 as
specified here:
https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2
This specification references the ARM semihosting release 2.0 as specified here:
https://static.docs.arm.com/100863/0200/semihosting.pdf
That specification includes several semihosting calls which were not
previously implemented. This series includes implementations for the
remaining calls so that both RISC-V and ARM versions are now complete.
Tests for release 2.0 can be found in picolibc on the semihost-2.0-all
branch:
https://github.com/picolibc/picolibc/tree/semihost-2.0-all
These tests uncovered a bug in the SYS_HEAPINFO implementation for
ARM, which has been fixed in this series as well.
The series is structured as follows:
1. Move shared semihosting files
2. Change public common semihosting APIs
3. Change internal semihosting interfaces
4. Fix SYS_HEAPINFO crash on ARM
5-6. Add RISC-V semihosting implementation
7-9. Add missing semihosting operations from release 2.0
Signed-off-by: Keith Packard <keithp@keithp.com>
next prev parent reply other threads:[~2020-12-14 20:08 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-25 21:36 [PATCH 0/8] Add RISC-V semihosting 0.2. Finish ARM semihosting 2.0 Keith Packard via
2020-11-25 21:36 ` [PATCH 1/8] semihosting: Move ARM semihosting code to shared directories [v3] Keith Packard via
2020-11-25 21:36 ` [PATCH 2/8] semihosting: Change common-semi API to be architecture-independent Keith Packard via
2020-11-25 21:36 ` [PATCH 3/8] semihosting: Change internal common-semi interfaces to use CPUState * [v2] Keith Packard via
2020-11-25 21:36 ` [PATCH 4/8] semihosting: Support SYS_HEAPINFO when env->boot_info is not set Keith Packard via
2020-11-25 21:36 ` [PATCH 5/8] riscv: Add semihosting support [v13] Keith Packard via
2020-12-09 7:58 ` Kito Cheng
2020-12-09 16:29 ` Keith Packard via
2020-12-10 3:39 ` Kito Cheng
2020-12-10 6:21 ` Keith Packard via
2020-12-14 11:29 ` Alex Bennée
2020-11-25 21:36 ` [PATCH 6/8] semihosting: Implement SYS_ELAPSED and SYS_TICKFREQ Keith Packard via
2020-11-25 21:36 ` [PATCH 7/8] semihosting: Implement SYS_TMPNAM Keith Packard via
2020-11-25 21:36 ` [PATCH 8/8] semihosting: Implement SYS_ISERROR Keith Packard via
2020-12-14 11:24 ` [PATCH 0/8] Add RISC-V semihosting 0.2. Finish ARM semihosting 2.0 Alex Bennée
2020-12-14 14:58 ` Alex Bennée
2020-12-14 20:06 ` Keith Packard via
2020-12-14 20:07 ` Keith Packard via [this message]
2020-12-14 20:07 ` [PATCH 1/9] semihosting: Move ARM semihosting code to shared directories Keith Packard via
2020-12-14 20:07 ` [PATCH 2/9] semihosting: Change common-semi API to be architecture-independent Keith Packard via
2020-12-14 20:07 ` [PATCH 3/9] semihosting: Change internal common-semi interfaces to use CPUState * Keith Packard via
2020-12-14 20:07 ` [PATCH 4/9] semihosting: Support SYS_HEAPINFO when env->boot_info is not set Keith Packard via
2020-12-14 20:07 ` [PATCH 5/9] riscv: Add semihosting support Keith Packard via
2020-12-14 20:07 ` [PATCH 6/9] riscv: Add semihosting support for user mode Keith Packard via
2020-12-14 20:07 ` [PATCH 7/9] semihosting: Implement SYS_ELAPSED and SYS_TICKFREQ Keith Packard via
2020-12-14 20:07 ` [PATCH 8/9] semihosting: Implement SYS_TMPNAM Keith Packard via
2020-12-14 20:07 ` [PATCH 9/9] semihosting: Implement SYS_ISERROR Keith Packard via
-- strict thread matches above, loose matches on Subject: below --
2021-01-07 17:07 [PATCH 0/9] Add RISC-V semihosting 0.2. Finish ARM semihosting 2.0 Keith Packard via
2021-01-08 22:32 ` Alex Bennée
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