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[88.21.206.101]) by smtp.gmail.com with ESMTPSA id l8sm3030281wmf.35.2020.12.16.05.43.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Dec 2020 05:43:30 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 00/11] target/mips/mips-defs: Simplify ISA definitions Date: Wed, 16 Dec 2020 14:43:17 +0100 Message-Id: <20201216134328.851840-1-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x32b.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Paul Burton , Richard Henderson , Laurent Vivier , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" As we don't need to duplicate 32/64-bit ISA defititions,=0D this series remove the duplicated 64-bit variants,=0D simplifying the overall.=0D =0D Changes done automatically with my editor using "find=0D and replace".=0D =0D While the 'ISA_MIPS_Rx' form is shorter than 'ISA_MIPS_RELx',=0D which one is the clearer?=0D =0D Regards,=0D =0D Phil.=0D =0D Philippe Mathieu-Daud=C3=A9 (11):=0D target/mips/mips-defs: Reorder CPU_MIPS5 definition=0D target/mips/mips-defs: Use ISA_MIPS3 for ISA_MIPS64=0D target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2=0D target/mips/mips-defs: Use ISA_MIPS32R3 definition to check Release 3=0D target/mips/mips-defs: Use ISA_MIPS32R5 definition to check Release 5=0D target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6=0D target/mips/mips-defs: Rename ISA_MIPS32 as ISA_MIPS_R1=0D target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2=0D target/mips/mips-defs: Rename ISA_MIPS32R3 as ISA_MIPS_R3=0D target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5=0D target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6=0D =0D target/mips/internal.h | 8 +-=0D target/mips/mips-defs.h | 40 +--=0D hw/mips/boston.c | 2 +-=0D linux-user/elfload.c | 2 +-=0D linux-user/mips/cpu_loop.c | 6 +-=0D target/mips/cp0_helper.c | 18 +-=0D target/mips/cp0_timer.c | 4 +-=0D target/mips/cpu.c | 12 +-=0D target/mips/fpu_helper.c | 4 +-=0D target/mips/tlb_helper.c | 6 +-=0D target/mips/translate.c | 620 ++++++++++++++++++-------------------=0D 11 files changed, 357 insertions(+), 365 deletions(-)=0D =0D -- =0D 2.26.2=0D =0D