From: Leif Lindholm <leif@nuviainc.com>
To: Laurent Desnogues <laurent.desnogues@gmail.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm <qemu-arm@nongnu.org>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Subject: Re: [PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h
Date: Thu, 17 Dec 2020 12:24:44 +0000 [thread overview]
Message-ID: <20201217122444.GL1664@vanye> (raw)
In-Reply-To: <CABoDooP_uW-w5JaMXmo6AzUomFp5BuSS27zn6x3hu1VKbNbEVA@mail.gmail.com>
On Thu, Dec 17, 2020 at 13:18:03 +0100, Laurent Desnogues wrote:
> On Thu, Dec 17, 2020 at 1:10 PM Leif Lindholm <leif@nuviainc.com> wrote:
> [...]
> > > > > > +FIELD(CCSIDR_EL1, LINESIZE, 0, 3)
> > > > > > +FIELD(CCSIDR_EL1, ASSOCIATIVITY, 3, 21)
> > > > > > +FIELD(CCSIDR_EL1, NUMSETS, 32, 24)
> > > > >
> > > > > The positions and sizes of the ASSOCIATIVITY and NUMSETS CCSIDR fields
> > > > > depend on whether the ARMv8.3-CCIDX extension is implemented or not.
> > > > > If we really want to define the fields this way, we perhaps should
> > > > > define two sets. Or at the very least, add a comment stating this
> > > > > definition is for ARMv8.3-CCIDX.
> > > >
> > > > Urgh, sorry for this.
> > > > I added the fields only to make the CPU definition more readable, so I
> > > > think we don't need to worry about runtime handling of this?
> > > > But I don't think it makes sense to add only the one form.
> > > > Should I use CCIDX_CCSIDR_EL1 for these ones and add
> > > >
> > > > /* When FEAT_CCIDX is not implemented */
> > > > FIELD(CCSIDR_EL1, LINESIZE, 0, 3)
> > > > FIELD(CCSIDR_EL1, ASSOCIATIVITY, 3, 10)
> > > > FIELD(CCSIDR_EL1, NUMSETS, 13, 15)
> > > >
> > > > with a comment that
> > > > /* When FEAT_CCIDX is implemented */
> > > > for the former set
> > > > ?
> > >
> > > Having both would be handy, but you need to have different names for
> > > the fields.
> >
> > Different names for the same field?
> > I.e.
> > FIELD(CCIDX_CCSIDR_EL1, LINESIZE, 0, 3)
> > would need a different name for LINESIZE than
> > FIELD(CCSIDR_EL1, LINESIZE, 0, 3)
> > ?
>
> I was thinking about changing the field names, not the register name
> because the register is the same, only the layout changes. So
> LINESIZE -> CCIDX_LINESIZE, etc.
>
> That's personal preference, Peter might have a different one.
I see. Sure, that works too, and doesn't pollute the register name.
I'll wait for Peter before sending out v3.
Thanks!
/
Leif
>
> Thanks,
>
> Laurent
next prev parent reply other threads:[~2020-12-17 12:31 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-15 11:48 [PATCH v2 0/5] target/arm: various changes to cpu.h Leif Lindholm
2020-12-15 11:48 ` [PATCH v2 1/5] target/arm: fix typo in cpu.h ID_AA64PFR1 field name Leif Lindholm
2020-12-15 12:25 ` Laurent Desnogues
2020-12-15 11:48 ` [PATCH v2 2/5] target/arm: make ARMCPU.clidr 64-bit Leif Lindholm
2020-12-15 12:29 ` Laurent Desnogues
2020-12-15 11:48 ` [PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h Leif Lindholm
2020-12-15 12:23 ` Laurent Desnogues
2020-12-15 16:49 ` Leif Lindholm
2020-12-17 10:02 ` Laurent Desnogues
2020-12-17 12:10 ` Leif Lindholm
2020-12-17 12:18 ` Laurent Desnogues
2020-12-17 12:24 ` Leif Lindholm [this message]
2021-01-07 17:43 ` Peter Maydell
2020-12-15 11:48 ` [PATCH v2 4/5] target/arm: add aarch64 ID register fields " Leif Lindholm
2020-12-15 12:28 ` Laurent Desnogues
2020-12-15 11:48 ` [PATCH v2 5/5] target/arm: add aarch32 " Leif Lindholm
2020-12-15 12:32 ` Laurent Desnogues
2020-12-15 12:11 ` [PATCH v2 0/5] target/arm: various changes " Peter Maydell
2020-12-15 16:14 ` Leif Lindholm
-- strict thread matches above, loose matches on Subject: below --
2020-12-14 12:35 [PATCH v2 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 " Leif Lindholm
2020-12-14 13:36 ` Peter Maydell
2020-12-15 11:49 ` Leif Lindholm
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