From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH 10/15] tcg/arm: Implement TCG_TARGET_HAS_sat_vec
Date: Thu, 24 Dec 2020 14:45:09 -0800 [thread overview]
Message-ID: <20201224224514.626561-11-richard.henderson@linaro.org> (raw)
In-Reply-To: <20201224224514.626561-1-richard.henderson@linaro.org>
This is saturating add and subtract, signed and unsigned.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/arm/tcg-target.h | 2 +-
tcg/arm/tcg-target.c.inc | 24 ++++++++++++++++++++++++
2 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 8e5b304a5a..c41dea2b03 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -166,7 +166,7 @@ extern bool use_neon_instructions;
#define TCG_TARGET_HAS_shs_vec 0
#define TCG_TARGET_HAS_shv_vec 0
#define TCG_TARGET_HAS_mul_vec 1
-#define TCG_TARGET_HAS_sat_vec 0
+#define TCG_TARGET_HAS_sat_vec 1
#define TCG_TARGET_HAS_minmax_vec 0
#define TCG_TARGET_HAS_bitsel_vec 0
#define TCG_TARGET_HAS_cmpsel_vec 0
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index d11efc553a..a6d9ee929b 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -187,6 +187,10 @@ typedef enum {
INSN_VORR = 0xf2200110,
INSN_VSUB = 0xf3000800,
INSN_VMUL = 0xf2000910,
+ INSN_VQADD = 0xf2000010,
+ INSN_VQADD_U = 0xf3000010,
+ INSN_VQSUB = 0xf2000210,
+ INSN_VQSUB_U = 0xf3000210,
INSN_VABS = 0xf3b10300,
INSN_VMVN = 0xf3b00580,
@@ -2373,7 +2377,11 @@ static int tcg_target_op_def(TCGOpcode op)
case INDEX_op_dup2_vec:
case INDEX_op_add_vec:
case INDEX_op_mul_vec:
+ case INDEX_op_ssadd_vec:
+ case INDEX_op_sssub_vec:
case INDEX_op_sub_vec:
+ case INDEX_op_usadd_vec:
+ case INDEX_op_ussub_vec:
case INDEX_op_xor_vec:
return C_O1_I2(w, w, w);
case INDEX_op_or_vec:
@@ -2743,6 +2751,18 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_sub_vec:
tcg_out_vreg3(s, INSN_VSUB, q, vece, a0, a1, a2);
return;
+ case INDEX_op_ssadd_vec:
+ tcg_out_vreg3(s, INSN_VQADD, q, vece, a0, a1, a2);
+ return;
+ case INDEX_op_sssub_vec:
+ tcg_out_vreg3(s, INSN_VQSUB, q, vece, a0, a1, a2);
+ return;
+ case INDEX_op_usadd_vec:
+ tcg_out_vreg3(s, INSN_VQADD_U, q, vece, a0, a1, a2);
+ return;
+ case INDEX_op_ussub_vec:
+ tcg_out_vreg3(s, INSN_VQSUB_U, q, vece, a0, a1, a2);
+ return;
case INDEX_op_xor_vec:
tcg_out_vreg3(s, INSN_VEOR, q, 0, a0, a1, a2);
return;
@@ -2853,6 +2873,10 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece)
case INDEX_op_shli_vec:
case INDEX_op_shri_vec:
case INDEX_op_sari_vec:
+ case INDEX_op_ssadd_vec:
+ case INDEX_op_sssub_vec:
+ case INDEX_op_usadd_vec:
+ case INDEX_op_ussub_vec:
return 1;
case INDEX_op_abs_vec:
case INDEX_op_cmp_vec:
--
2.25.1
next prev parent reply other threads:[~2020-12-24 22:52 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-24 22:44 [PATCH 00/15] tcg/arm: host neon support Richard Henderson
2020-12-24 22:45 ` [PATCH 01/15] tcg/arm: Add host vector framework Richard Henderson
2020-12-24 22:45 ` [PATCH 02/15] tcg/arm: Implement tcg_out_ld/st for vector types Richard Henderson
2020-12-24 22:45 ` [PATCH 03/15] tcg/arm: Implement tcg_out_mov " Richard Henderson
2020-12-24 22:45 ` [PATCH 04/15] tcg/arm: Implement tcg_out_dup*_vec Richard Henderson
2020-12-24 22:45 ` [PATCH 05/15] tcg: Change parameters for tcg_target_const_match Richard Henderson
2020-12-24 22:45 ` [PATCH 06/15] tcg/arm: Implement minimal vector operations Richard Henderson
2020-12-24 22:45 ` [PATCH 07/15] tcg/arm: Implement andc, orc, abs, neg, not " Richard Henderson
2020-12-24 22:45 ` [PATCH 08/15] tcg/arm: Implement TCG_TARGET_HAS_shi_vec Richard Henderson
2020-12-24 22:45 ` [PATCH 09/15] tcg/arm: Implement TCG_TARGET_HAS_mul_vec Richard Henderson
2020-12-24 22:45 ` Richard Henderson [this message]
2020-12-24 22:45 ` [PATCH 11/15] tcg/arm: Implement TCG_TARGET_HAS_minmax_vec Richard Henderson
2020-12-24 22:45 ` [PATCH 12/15] tcg/arm: Implement TCG_TARGET_HAS_bitsel_vec Richard Henderson
2020-12-24 22:45 ` [PATCH 13/15] tcg/arm: Implement TCG_TARGET_HAS_shv_vec Richard Henderson
2020-12-24 22:45 ` [PATCH 14/15] tcg/arm: Implement TCG_TARGET_HAS_roti_vec Richard Henderson
2020-12-24 22:45 ` [PATCH 15/15] tcg/arm: Implement TCG_TARGET_HAS_rotv_vec Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201224224514.626561-11-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).