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[83.42.57.239]) by smtp.gmail.com with ESMTPSA id x17sm76034444wro.40.2021.01.01.15.12.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Jan 2021 15:12:32 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [RFC PATCH 3/5] hw/pci-host/bonito: Remap PCI "lo" regions when PCIMAP reg is modified Date: Sat, 2 Jan 2021 00:12:13 +0100 Message-Id: <20210101231215.1870611-4-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210101231215.1870611-1-f4bug@amsat.org> References: <20210101231215.1870611-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x331.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Aleksandar Rikalo , qemu-block@nongnu.org, Huacai Chen , Mark Cave-Ayland , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Artyom Tarasenko , Cleber Rosa , John Snow , Aurelien Jarno , Wainer dos Santos Moschetta Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Per the datasheet (Chapter 5.7.1. "PCI address regions"), the PCIMAP register: Map the 64Mbyte regions marked "PCI_Lo" in the CPU's memory map, each of which can be assigned to any 64 Mbyte-aligned region of PCI memory. The address appearing on the PCI bus consists of the low 26 bits of the CPU physical address, with the high 6 bits coming from the appropriate base6 field. Each of the three regions is an independent window onto PCI memory, and can be positioned on any 64Mbyte boundary in PCI space. Remap the 3 regions on reset and when PCIMAP is updated. Signed-off-by: Philippe Mathieu-Daudé --- hw/pci-host/bonito.c | 49 ++++++++++++++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 13 deletions(-) diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index a99eced0657..c58eeaf504c 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -137,6 +137,10 @@ FIELD(BONGENCFG, PCIQUEUE, 12, 1) /* 4. PCI address map control */ #define BONITO_PCIMAP (0x10 >> 2) /* 0x110 */ +FIELD(PCIMAP, LO0, 0, 6) +FIELD(PCIMAP, LO1, 6, 6) +FIELD(PCIMAP, LO2, 12, 6) +FIELD(PCIMAP, 2G, 18, 1) #define BONITO_PCIMEMBASECFG (0x14 >> 2) /* 0x114 */ #define BONITO_PCIMAP_CFG (0x18 >> 2) /* 0x118 */ @@ -237,6 +241,7 @@ struct BonitoState { qemu_irq *pic; PCIBonitoState *pci_dev; MemoryRegion pci_mem; + MemoryRegion pcimem_lo_alias[3]; }; #define TYPE_BONITO_PCI_HOST_BRIDGE "Bonito-pcihost" @@ -245,6 +250,31 @@ OBJECT_DECLARE_SIMPLE_TYPE(BonitoState, BONITO_PCI_HOST_BRIDGE) #define TYPE_PCI_BONITO "Bonito" OBJECT_DECLARE_SIMPLE_TYPE(PCIBonitoState, PCI_BONITO) +static void bonito_remap(PCIBonitoState *s) +{ + static const char *const region_name[3] = { + "pci.lomem0", "pci.lomem1", "pci.lomem2" + }; + BonitoState *bs = BONITO_PCI_HOST_BRIDGE(s->pcihost); + + for (size_t i = 0; i < 3; i++) { + uint32_t offset = extract32(s->regs[BONITO_PCIMAP], 6 * i, 6) << 26; + + if (memory_region_is_mapped(&bs->pcimem_lo_alias[i])) { + memory_region_del_subregion(get_system_memory(), + &bs->pcimem_lo_alias[i]); + object_unparent(OBJECT(&bs->pcimem_lo_alias[i])); + } + + memory_region_init_alias(&bs->pcimem_lo_alias[i], OBJECT(s), + region_name[i], &bs->pci_mem, + offset, 64 * MiB); + memory_region_add_subregion(get_system_memory(), + BONITO_PCILO_BASE + i * 64 * MiB, + &bs->pcimem_lo_alias[i]); + } +} + static void bonito_writel(void *opaque, hwaddr addr, uint64_t val, unsigned size) { @@ -260,7 +290,6 @@ static void bonito_writel(void *opaque, hwaddr addr, case BONITO_BONPONCFG: case BONITO_IODEVCFG: case BONITO_SDCFG: - case BONITO_PCIMAP: case BONITO_PCIMEMBASECFG: case BONITO_PCIMAP_CFG: case BONITO_GPIODATA: @@ -282,6 +311,10 @@ static void bonito_writel(void *opaque, hwaddr addr, case BONITO_MEMSIZE: s->regs[saddr] = val; break; + case BONITO_PCIMAP: + s->regs[saddr] = val; + bonito_remap(s); + break; case BONITO_BONGENCFG: if (!(s->regs[saddr] & 0x04) && (val & 0x04)) { reset = 1; /* bit 2 jump from 0 to 1 cause reset */ @@ -610,6 +643,8 @@ static void bonito_reset(void *opaque) s->regs[BONITO_DQCFG] = 0x8; s->regs[BONITO_MEMSIZE] = 0x10000000; s->regs[BONITO_PCIMAP] = 0x6140; + + bonito_remap(s); } static const VMStateDescription vmstate_bonito = { @@ -626,7 +661,6 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp) { PCIHostState *phb = PCI_HOST_BRIDGE(dev); BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev); - MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3); memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE); phb->bus = pci_register_root_bus(dev, "pci", @@ -634,17 +668,6 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp) dev, &bs->pci_mem, get_system_io(), 0x28, 32, TYPE_PCI_BUS); - for (size_t i = 0; i < 3; i++) { - char *name = g_strdup_printf("pci.lomem%zu", i); - - memory_region_init_alias(&pcimem_lo_alias[i], NULL, name, - &bs->pci_mem, i * 64 * MiB, 64 * MiB); - memory_region_add_subregion(get_system_memory(), - BONITO_PCILO_BASE + i * 64 * MiB, - &pcimem_lo_alias[i]); - g_free(name); - } - create_unimplemented_device("pci.io", BONITO_PCIIO_BASE, 1 * MiB); } -- 2.26.2