From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Alistair Francis <alistair.francis@wdc.com>
Subject: [PATCH v5 35/43] tcg/riscv: Remove branch-over-branch fallback
Date: Tue, 5 Jan 2021 07:19:42 -1000 [thread overview]
Message-ID: <20210105171950.415486-36-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210105171950.415486-1-richard.henderson@linaro.org>
Since 7ecd02a06f8, we are prepared to re-start code generation
with a smaller TB if a relocation is out of range. We no longer
need to leave a nop in the stream Just In Case.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/riscv/tcg-target.c.inc | 56 ++++----------------------------------
1 file changed, 6 insertions(+), 50 deletions(-)
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index 5b4c500a4b..34bee9c5a7 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -469,43 +469,16 @@ static bool reloc_call(tcg_insn_unit *code_ptr, const tcg_insn_unit *target)
static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
intptr_t value, intptr_t addend)
{
- uint32_t insn = *code_ptr;
- intptr_t diff;
- bool short_jmp;
-
tcg_debug_assert(addend == 0);
-
switch (type) {
case R_RISCV_BRANCH:
- diff = value - (uintptr_t)code_ptr;
- short_jmp = diff == sextreg(diff, 0, 12);
- if (short_jmp) {
- return reloc_sbimm12(code_ptr, (tcg_insn_unit *)value);
- } else {
- /* Invert the condition */
- insn = insn ^ (1 << 12);
- /* Clear the offset */
- insn &= 0x01fff07f;
- /* Set the offset to the PC + 8 */
- insn |= encode_sbimm12(8);
-
- /* Move forward */
- code_ptr[0] = insn;
-
- /* Overwrite the NOP with jal x0,value */
- diff = value - (uintptr_t)(code_ptr + 1);
- insn = encode_uj(OPC_JAL, TCG_REG_ZERO, diff);
- code_ptr[1] = insn;
-
- return true;
- }
- break;
+ return reloc_sbimm12(code_ptr, (tcg_insn_unit *)value);
case R_RISCV_JAL:
return reloc_jimm20(code_ptr, (tcg_insn_unit *)value);
case R_RISCV_CALL:
return reloc_call(code_ptr, (tcg_insn_unit *)value);
default:
- tcg_abort();
+ g_assert_not_reached();
}
}
@@ -779,21 +752,8 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1,
arg2 = t;
}
- if (l->has_value) {
- intptr_t diff = tcg_pcrel_diff(s, l->u.value_ptr);
- if (diff == sextreg(diff, 0, 12)) {
- tcg_out_opc_branch(s, op, arg1, arg2, diff);
- } else {
- /* Invert the conditional branch. */
- tcg_out_opc_branch(s, op ^ (1 << 12), arg1, arg2, 8);
- tcg_out_opc_jump(s, OPC_JAL, TCG_REG_ZERO, diff - 4);
- }
- } else {
- tcg_out_reloc(s, s->code_ptr, R_RISCV_BRANCH, l, 0);
- tcg_out_opc_branch(s, op, arg1, arg2, 0);
- /* NOP to allow patching later */
- tcg_out_opc_imm(s, OPC_ADDI, TCG_REG_ZERO, TCG_REG_ZERO, 0);
- }
+ tcg_out_reloc(s, s->code_ptr, R_RISCV_BRANCH, l, 0);
+ tcg_out_opc_branch(s, op, arg1, arg2, 0);
}
static void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGReg ret,
@@ -1009,8 +969,6 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg addrl,
/* Compare masked address with the TLB entry. */
label_ptr[0] = s->code_ptr;
tcg_out_opc_branch(s, OPC_BNE, TCG_REG_TMP0, TCG_REG_TMP1, 0);
- /* NOP to allow patching later */
- tcg_out_opc_imm(s, OPC_ADDI, TCG_REG_ZERO, TCG_REG_ZERO, 0);
/* TLB Hit - translate address using addend. */
if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
@@ -1054,8 +1012,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
}
/* resolve label address */
- if (!patch_reloc(l->label_ptr[0], R_RISCV_BRANCH,
- (intptr_t) s->code_ptr, 0)) {
+ if (!reloc_sbimm12(l->label_ptr[0], s->code_ptr)) {
return false;
}
@@ -1089,8 +1046,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
}
/* resolve label address */
- if (!patch_reloc(l->label_ptr[0], R_RISCV_BRANCH,
- (intptr_t) s->code_ptr, 0)) {
+ if (!reloc_sbimm12(l->label_ptr[0], s->code_ptr)) {
return false;
}
--
2.25.1
next prev parent reply other threads:[~2021-01-05 18:07 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-05 17:19 [PATCH v5 00/43] Mirror map JIT memory for TCG Richard Henderson
2021-01-05 17:19 ` [PATCH v5 01/43] tcg: Do not flush icache for interpreter Richard Henderson
2021-01-05 17:19 ` [PATCH v5 02/43] util: Extract flush_icache_range to cacheflush.c Richard Henderson
2021-01-05 17:19 ` [PATCH v5 03/43] util: Enhance flush_icache_range with separate data pointer Richard Henderson
2021-01-05 17:19 ` [PATCH v5 04/43] util: Specialize flush_idcache_range for aarch64 Richard Henderson
2021-01-05 17:19 ` [PATCH v5 05/43] tcg: Move tcg prologue pointer out of TCGContext Richard Henderson
2021-01-05 17:19 ` [PATCH v5 06/43] tcg: Move tcg epilogue " Richard Henderson
2021-01-05 17:19 ` [PATCH v5 07/43] tcg: Add in_code_gen_buffer Richard Henderson
2021-01-05 17:19 ` [PATCH v5 08/43] tcg: Introduce tcg_splitwx_to_{rx,rw} Richard Henderson
2021-01-05 17:19 ` [PATCH v5 09/43] tcg: Adjust TCGLabel for const Richard Henderson
2021-01-05 17:19 ` [PATCH v5 10/43] tcg: Adjust tcg_out_call " Richard Henderson
2021-01-05 17:19 ` [PATCH v5 11/43] tcg: Adjust tcg_out_label " Richard Henderson
2021-01-05 17:19 ` [PATCH v5 12/43] tcg: Adjust tcg_register_jit " Richard Henderson
2021-01-05 17:19 ` [PATCH v5 13/43] tcg: Adjust tb_target_set_jmp_target for split-wx Richard Henderson
2021-01-05 17:19 ` [PATCH v5 14/43] tcg: Make DisasContextBase.tb const Richard Henderson
2021-01-05 17:19 ` [PATCH v5 15/43] tcg: Make tb arg to synchronize_from_tb const Richard Henderson
2021-01-05 17:19 ` [PATCH v5 16/43] tcg: Use Error with alloc_code_gen_buffer Richard Henderson
2021-01-05 18:55 ` Philippe Mathieu-Daudé
2021-01-05 17:19 ` [PATCH v5 17/43] tcg: Add --accel tcg,split-wx property Richard Henderson
2021-01-05 20:30 ` Joelle van Dyne
2021-01-05 17:19 ` [PATCH v5 18/43] accel/tcg: Support split-wx for linux with memfd Richard Henderson
2021-01-05 17:19 ` [PATCH v5 19/43] accel/tcg: Support split-wx for darwin/iOS with vm_remap Richard Henderson
2021-01-05 17:19 ` [PATCH v5 20/43] tcg: Return the TB pointer from the rx region from exit_tb Richard Henderson
2021-01-05 17:19 ` [PATCH v5 21/43] tcg/i386: Support split-wx code generation Richard Henderson
2021-01-05 17:19 ` [PATCH v5 22/43] tcg/aarch64: Use B not BL for tcg_out_goto_long Richard Henderson
2021-01-05 17:19 ` [PATCH v5 23/43] tcg/aarch64: Support split-wx code generation Richard Henderson
2021-01-05 17:19 ` [PATCH v5 24/43] disas: Push const down through host disassembly Richard Henderson
2021-01-05 17:19 ` [PATCH v5 25/43] tcg/tci: Push const down through bytecode reading Richard Henderson
2021-01-05 18:51 ` Philippe Mathieu-Daudé
2021-01-05 17:19 ` [PATCH v5 26/43] tcg: Introduce tcg_tbrel_diff Richard Henderson
2021-01-05 17:19 ` [PATCH v5 27/43] tcg/ppc: Use tcg_tbrel_diff Richard Henderson
2021-01-05 17:19 ` [PATCH v5 28/43] tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB Richard Henderson
2021-01-05 17:19 ` [PATCH v5 29/43] tcg/ppc: Support split-wx code generation Richard Henderson
2021-01-05 17:19 ` [PATCH v5 30/43] tcg/sparc: Use tcg_tbrel_diff Richard Henderson
2021-01-05 17:19 ` [PATCH v5 31/43] tcg/sparc: Support split-wx code generation Richard Henderson
2021-01-05 17:19 ` [PATCH v5 32/43] tcg/s390: Use tcg_tbrel_diff Richard Henderson
2021-01-05 17:19 ` [PATCH v5 33/43] tcg/s390: Support split-wx code generation Richard Henderson
2021-01-05 17:19 ` [PATCH v5 34/43] tcg/riscv: Fix branch range checks Richard Henderson
2021-01-05 17:19 ` Richard Henderson [this message]
2021-01-05 17:19 ` [PATCH v5 36/43] tcg/riscv: Support split-wx code generation Richard Henderson
2021-01-05 17:19 ` [PATCH v5 37/43] accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd Richard Henderson
2021-01-05 17:19 ` [PATCH v5 38/43] tcg/mips: Do not assert on relocation overflow Richard Henderson
2021-01-05 17:19 ` [PATCH v5 39/43] tcg/mips: Support split-wx code generation Richard Henderson
2021-01-05 17:19 ` [PATCH v5 40/43] tcg/arm: " Richard Henderson
2021-01-05 17:19 ` [PATCH v5 41/43] tcg: Remove TCG_TARGET_SUPPORT_MIRROR Richard Henderson
2021-01-05 17:19 ` [PATCH v5 42/43] tcg: Constify tcg_code_gen_epilogue Richard Henderson
2021-01-05 18:47 ` Philippe Mathieu-Daudé
2021-01-05 17:19 ` [PATCH v5 43/43] tcg: Constify TCGLabelQemuLdst.raddr Richard Henderson
2021-01-05 18:47 ` Philippe Mathieu-Daudé
2021-01-05 18:12 ` [PATCH v5 00/43] Mirror map JIT memory for TCG no-reply
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