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From: Bin Meng <bmeng.cn@gmail.com>
To: "Peter Maydell" <peter.maydell@linaro.org>,
	"Jean-Christophe Dubois" <jcd@tribudubois.net>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Xuzhou Cheng <xuzhou.cheng@windriver.com>,
	Bin Meng <bin.meng@windriver.com>
Subject: [PATCH v3 2/6] hw/ssi: imx_spi: Disable chip selects when controller is disabled
Date: Sat,  9 Jan 2021 20:35:41 +0800	[thread overview]
Message-ID: <20210109123545.12001-3-bmeng.cn@gmail.com> (raw)
In-Reply-To: <20210109123545.12001-1-bmeng.cn@gmail.com>

From: Xuzhou Cheng <xuzhou.cheng@windriver.com>

When a write to ECSPI_CONREG register to disable the SPI controller,
imx_spi_reset() is called to reset the controller, but chip select
lines should have been disabled, otherwise the state machine of any
devices (e.g.: SPI flashes) connected to the SPI master is stuck to
its last state and responds incorrectly to any follow-up commands.

Fixes: c906a3a01582 ("i.MX: Add the Freescale SPI Controller")
Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>

---

Changes in v3:
- Move the chip selects disable out of imx_spi_reset()

Changes in v2:
- Fix the "Fixes" tag in the commit message

 hw/ssi/imx_spi.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index e605049a21..8d429e703f 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -353,6 +353,11 @@ static void imx_spi_write(void *opaque, hwaddr offset, uint64_t value,
         if (!imx_spi_is_enabled(s)) {
             /* device is disabled, so this is a reset */
             imx_spi_reset(DEVICE(s));
+
+            for (int i = 0; i < ECSPI_NUM_CS; i++) {
+                qemu_set_irq(s->cs_lines[i], 1);
+            }
+
             return;
         }
 
-- 
2.25.1



  parent reply	other threads:[~2021-01-09 12:37 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-09 12:35 [PATCH v3 0/6] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Bin Meng
2021-01-09 12:35 ` [PATCH v3 1/6] hw/ssi: imx_spi: Use a macro for number of chip selects supported Bin Meng
2021-01-09 23:45   ` Philippe Mathieu-Daudé
2021-01-09 12:35 ` Bin Meng [this message]
2021-01-09 23:48   ` [PATCH v3 2/6] hw/ssi: imx_spi: Disable chip selects when controller is disabled Philippe Mathieu-Daudé
2021-01-09 12:35 ` [PATCH v3 3/6] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset() Bin Meng
2021-01-09 23:53   ` Philippe Mathieu-Daudé
2021-01-10  1:41     ` Bin Meng
2021-01-09 12:35 ` [PATCH v3 4/6] hw/ssi: imx_spi: Log unimplemented burst length Bin Meng
2021-01-09 23:55   ` Philippe Mathieu-Daudé
2021-01-09 12:35 ` [PATCH v3 5/6] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic Bin Meng
2021-01-09 12:35 ` [PATCH v3 6/6] hw/ssi: imx_spi: Correct tx and rx fifo endianness Bin Meng

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