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From: Bin Meng <bmeng.cn@gmail.com>
To: "Peter Maydell" <peter.maydell@linaro.org>,
	"Jean-Christophe Dubois" <jcd@tribudubois.net>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Bin Meng <bin.meng@windriver.com>
Subject: [PATCH v3 4/6] hw/ssi: imx_spi: Log unimplemented burst length
Date: Sat,  9 Jan 2021 20:35:43 +0800	[thread overview]
Message-ID: <20210109123545.12001-5-bmeng.cn@gmail.com> (raw)
In-Reply-To: <20210109123545.12001-1-bmeng.cn@gmail.com>

From: Bin Meng <bin.meng@windriver.com>

Current implementation of the imx spi controller expects the burst
length to be multiple of 8, which is the most normal use case.

In case the burst length is not what we expect, log it to give user
a chance to notice it.

Signed-off-by: Bin Meng <bin.meng@windriver.com>

---

Changes in v3:
- new patch: log unimplemented burst length

 hw/ssi/imx_spi.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index 880939f595..609d4b658e 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -128,7 +128,16 @@ static uint8_t imx_spi_selected_channel(IMXSPIState *s)
 
 static uint32_t imx_spi_burst_length(IMXSPIState *s)
 {
-    return EXTRACT(s->regs[ECSPI_CONREG], ECSPI_CONREG_BURST_LENGTH) + 1;
+    uint32_t burst;
+
+    burst = EXTRACT(s->regs[ECSPI_CONREG], ECSPI_CONREG_BURST_LENGTH) + 1;
+    if (burst % 8) {
+        qemu_log_mask(LOG_UNIMP,
+                      "[%s]%s: burst length not multiple of 8!\n",
+                      TYPE_IMX_SPI, __func__);
+    }
+
+    return burst;
 }
 
 static bool imx_spi_is_enabled(IMXSPIState *s)
-- 
2.25.1



  parent reply	other threads:[~2021-01-09 12:46 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-09 12:35 [PATCH v3 0/6] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Bin Meng
2021-01-09 12:35 ` [PATCH v3 1/6] hw/ssi: imx_spi: Use a macro for number of chip selects supported Bin Meng
2021-01-09 23:45   ` Philippe Mathieu-Daudé
2021-01-09 12:35 ` [PATCH v3 2/6] hw/ssi: imx_spi: Disable chip selects when controller is disabled Bin Meng
2021-01-09 23:48   ` Philippe Mathieu-Daudé
2021-01-09 12:35 ` [PATCH v3 3/6] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset() Bin Meng
2021-01-09 23:53   ` Philippe Mathieu-Daudé
2021-01-10  1:41     ` Bin Meng
2021-01-09 12:35 ` Bin Meng [this message]
2021-01-09 23:55   ` [PATCH v3 4/6] hw/ssi: imx_spi: Log unimplemented burst length Philippe Mathieu-Daudé
2021-01-09 12:35 ` [PATCH v3 5/6] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic Bin Meng
2021-01-09 12:35 ` [PATCH v3 6/6] hw/ssi: imx_spi: Correct tx and rx fifo endianness Bin Meng

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