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[173.197.107.21]) by smtp.gmail.com with ESMTPSA id k64sm206666pfd.75.2021.01.11.09.20.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jan 2021 09:20:10 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v6 13/23] tcg: Use tcg_constant_i32 with icount expander Date: Mon, 11 Jan 2021 07:19:36 -1000 Message-Id: <20210111171946.219469-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210111171946.219469-1-richard.henderson@linaro.org> References: <20210111171946.219469-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We must do this before we adjust tcg_out_movi_i32, lest the under-the-hood poking that we do for icount be broken. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/exec/gen-icount.h | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h index aa4b44354a..298e01eef4 100644 --- a/include/exec/gen-icount.h +++ b/include/exec/gen-icount.h @@ -34,7 +34,7 @@ static inline void gen_io_end(void) static inline void gen_tb_start(const TranslationBlock *tb) { - TCGv_i32 count, imm; + TCGv_i32 count; tcg_ctx->exitreq_label = gen_new_label(); if (tb_cflags(tb) & CF_USE_ICOUNT) { @@ -48,15 +48,13 @@ static inline void gen_tb_start(const TranslationBlock *tb) offsetof(ArchCPU, env)); if (tb_cflags(tb) & CF_USE_ICOUNT) { - imm = tcg_temp_new_i32(); - /* We emit a movi with a dummy immediate argument. Keep the insn index - * of the movi so that we later (when we know the actual insn count) - * can update the immediate argument with the actual insn count. */ - tcg_gen_movi_i32(imm, 0xdeadbeef); + /* + * We emit a sub with a dummy immediate argument. Keep the insn index + * of the sub so that we later (when we know the actual insn count) + * can update the argument with the actual insn count. + */ + tcg_gen_sub_i32(count, count, tcg_constant_i32(0)); icount_start_insn = tcg_last_op(); - - tcg_gen_sub_i32(count, count, imm); - tcg_temp_free_i32(imm); } tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, tcg_ctx->exitreq_label); @@ -74,9 +72,12 @@ static inline void gen_tb_start(const TranslationBlock *tb) static inline void gen_tb_end(const TranslationBlock *tb, int num_insns) { if (tb_cflags(tb) & CF_USE_ICOUNT) { - /* Update the num_insn immediate parameter now that we know - * the actual insn count. */ - tcg_set_insn_param(icount_start_insn, 1, num_insns); + /* + * Update the num_insn immediate parameter now that we know + * the actual insn count. + */ + tcg_set_insn_param(icount_start_insn, 2, + tcgv_i32_arg(tcg_constant_i32(num_insns))); } gen_set_label(tcg_ctx->exitreq_label); -- 2.25.1