From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Alex Bennée" <alex.bennee@linaro.org>
Subject: [PATCH v6 20/23] tcg/i386: Use tcg_constant_vec with tcg vec expanders
Date: Mon, 11 Jan 2021 07:19:43 -1000 [thread overview]
Message-ID: <20210111171946.219469-21-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210111171946.219469-1-richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.c.inc | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 1706b7c776..050f3cb0b1 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -3486,7 +3486,7 @@ static void expand_vec_rotv(TCGType type, unsigned vece, TCGv_vec v0,
static void expand_vec_mul(TCGType type, unsigned vece,
TCGv_vec v0, TCGv_vec v1, TCGv_vec v2)
{
- TCGv_vec t1, t2, t3, t4;
+ TCGv_vec t1, t2, t3, t4, zero;
tcg_debug_assert(vece == MO_8);
@@ -3504,11 +3504,11 @@ static void expand_vec_mul(TCGType type, unsigned vece,
case TCG_TYPE_V64:
t1 = tcg_temp_new_vec(TCG_TYPE_V128);
t2 = tcg_temp_new_vec(TCG_TYPE_V128);
- tcg_gen_dup16i_vec(t2, 0);
+ zero = tcg_constant_vec(TCG_TYPE_V128, MO_8, 0);
vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
- tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(t2));
+ tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(zero));
vec_gen_3(INDEX_op_x86_punpckl_vec, TCG_TYPE_V128, MO_8,
- tcgv_vec_arg(t2), tcgv_vec_arg(t2), tcgv_vec_arg(v2));
+ tcgv_vec_arg(t2), tcgv_vec_arg(zero), tcgv_vec_arg(v2));
tcg_gen_mul_vec(MO_16, t1, t1, t2);
tcg_gen_shri_vec(MO_16, t1, t1, 8);
vec_gen_3(INDEX_op_x86_packus_vec, TCG_TYPE_V128, MO_8,
@@ -3523,15 +3523,15 @@ static void expand_vec_mul(TCGType type, unsigned vece,
t2 = tcg_temp_new_vec(type);
t3 = tcg_temp_new_vec(type);
t4 = tcg_temp_new_vec(type);
- tcg_gen_dup16i_vec(t4, 0);
+ zero = tcg_constant_vec(TCG_TYPE_V128, MO_8, 0);
vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8,
- tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(t4));
+ tcgv_vec_arg(t1), tcgv_vec_arg(v1), tcgv_vec_arg(zero));
vec_gen_3(INDEX_op_x86_punpckl_vec, type, MO_8,
- tcgv_vec_arg(t2), tcgv_vec_arg(t4), tcgv_vec_arg(v2));
+ tcgv_vec_arg(t2), tcgv_vec_arg(zero), tcgv_vec_arg(v2));
vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8,
- tcgv_vec_arg(t3), tcgv_vec_arg(v1), tcgv_vec_arg(t4));
+ tcgv_vec_arg(t3), tcgv_vec_arg(v1), tcgv_vec_arg(zero));
vec_gen_3(INDEX_op_x86_punpckh_vec, type, MO_8,
- tcgv_vec_arg(t4), tcgv_vec_arg(t4), tcgv_vec_arg(v2));
+ tcgv_vec_arg(t4), tcgv_vec_arg(zero), tcgv_vec_arg(v2));
tcg_gen_mul_vec(MO_16, t1, t1, t2);
tcg_gen_mul_vec(MO_16, t3, t3, t4);
tcg_gen_shri_vec(MO_16, t1, t1, 8);
@@ -3559,7 +3559,7 @@ static bool expand_vec_cmp_noinv(TCGType type, unsigned vece, TCGv_vec v0,
NEED_UMIN = 8,
NEED_UMAX = 16,
};
- TCGv_vec t1, t2;
+ TCGv_vec t1, t2, t3;
uint8_t fixup;
switch (cond) {
@@ -3630,9 +3630,9 @@ static bool expand_vec_cmp_noinv(TCGType type, unsigned vece, TCGv_vec v0,
} else if (fixup & NEED_BIAS) {
t1 = tcg_temp_new_vec(type);
t2 = tcg_temp_new_vec(type);
- tcg_gen_dupi_vec(vece, t2, 1ull << ((8 << vece) - 1));
- tcg_gen_sub_vec(vece, t1, v1, t2);
- tcg_gen_sub_vec(vece, t2, v2, t2);
+ t3 = tcg_constant_vec(type, vece, 1ull << ((8 << vece) - 1));
+ tcg_gen_sub_vec(vece, t1, v1, t3);
+ tcg_gen_sub_vec(vece, t2, v2, t3);
v1 = t1;
v2 = t2;
cond = tcg_signed_cond(cond);
--
2.25.1
next prev parent reply other threads:[~2021-01-11 17:45 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-11 17:19 [PATCH v6 00/23] tcg: Better handling of constants Richard Henderson
2021-01-11 17:19 ` [PATCH v6 01/23] tcg: Use tcg_out_dupi_vec from temp_load Richard Henderson
2021-01-11 17:19 ` [PATCH v6 02/23] tcg: Increase tcg_out_dupi_vec immediate to int64_t Richard Henderson
2021-01-11 17:19 ` [PATCH v6 03/23] tcg: Consolidate 3 bits into enum TCGTempKind Richard Henderson
2021-01-11 17:19 ` [PATCH v6 04/23] tcg: Add temp_readonly Richard Henderson
2021-01-11 17:19 ` [PATCH v6 05/23] tcg: Expand TCGTemp.val to 64-bits Richard Henderson
2021-01-11 17:19 ` [PATCH v6 06/23] tcg: Rename struct tcg_temp_info to TempOptInfo Richard Henderson
2021-01-11 17:19 ` [PATCH v6 07/23] tcg: Expand TempOptInfo to 64-bits Richard Henderson
2021-01-11 17:19 ` [PATCH v6 08/23] tcg: Introduce TYPE_CONST temporaries Richard Henderson
2021-01-11 17:19 ` [PATCH v6 09/23] tcg/optimize: Improve find_better_copy Richard Henderson
2021-01-11 17:19 ` [PATCH v6 10/23] tcg/optimize: Adjust TempOptInfo allocation Richard Henderson
2021-01-11 17:19 ` [PATCH v6 11/23] tcg/optimize: Use tcg_constant_internal with constant folding Richard Henderson
2021-01-11 17:19 ` [PATCH v6 12/23] tcg: Convert tcg_gen_dupi_vec to TCG_CONST Richard Henderson
2021-01-11 17:19 ` [PATCH v6 13/23] tcg: Use tcg_constant_i32 with icount expander Richard Henderson
2021-01-11 17:19 ` [PATCH v6 14/23] tcg: Use tcg_constant_{i32, i64} with tcg int expanders Richard Henderson
2021-01-11 17:19 ` [PATCH v6 15/23] tcg: Use tcg_constant_{i32,i64} with tcg plugins Richard Henderson
2021-01-11 17:19 ` [PATCH v6 16/23] tcg: Use tcg_constant_{i32, i64, vec} with gvec expanders Richard Henderson
2021-01-11 17:19 ` [PATCH v6 17/23] tcg/tci: Add special tci_movi_{i32,i64} opcodes Richard Henderson
2021-01-11 17:19 ` [PATCH v6 18/23] tcg: Remove movi and dupi opcodes Richard Henderson
2021-01-11 17:19 ` [PATCH v6 19/23] tcg: Add tcg_reg_alloc_dup2 Richard Henderson
2021-01-11 17:19 ` Richard Henderson [this message]
2021-01-11 17:19 ` [PATCH v6 21/23] tcg: Remove tcg_gen_dup{8,16,32,64}i_vec Richard Henderson
2021-01-11 17:19 ` [PATCH v6 22/23] tcg/ppc: Use tcg_constant_vec with tcg vec expanders Richard Henderson
2021-01-11 17:19 ` [PATCH v6 23/23] tcg/aarch64: " Richard Henderson
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