From: Bin Meng <bmeng.cn@gmail.com>
To: "Peter Maydell" <peter.maydell@linaro.org>,
"Jean-Christophe Dubois" <jcd@tribudubois.net>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Bin Meng <bin.meng@windriver.com>
Subject: [PATCH v5 2/6] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset()
Date: Tue, 12 Jan 2021 22:55:22 +0800 [thread overview]
Message-ID: <20210112145526.31095-3-bmeng.cn@gmail.com> (raw)
In-Reply-To: <20210112145526.31095-1-bmeng.cn@gmail.com>
From: Bin Meng <bin.meng@windriver.com>
Usually the approach is that the device on the other end of the line
is going to reset its state anyway, so there's no need to actively
signal an irq line change during the reset hook.
Move imx_spi_update_irq() out of imx_spi_reset(), to a new function
imx_spi_soft_reset() that is called when the controller is disabled.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
Changes in v5:
- rename imx_spi_hard_reset() to imx_spi_soft_reset()
Changes in v4:
- adujst the patch 2,3 order
- rename imx_spi_soft_reset() to imx_spi_hard_reset() to avoid confusion
Changes in v3:
- new patch: remove imx_spi_update_irq() in imx_spi_reset()
hw/ssi/imx_spi.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index e605049a21..4d488b159a 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -241,11 +241,16 @@ static void imx_spi_reset(DeviceState *dev)
imx_spi_rxfifo_reset(s);
imx_spi_txfifo_reset(s);
- imx_spi_update_irq(s);
-
s->burst_length = 0;
}
+static void imx_spi_soft_reset(IMXSPIState *s)
+{
+ imx_spi_reset(DEVICE(s));
+
+ imx_spi_update_irq(s);
+}
+
static uint64_t imx_spi_read(void *opaque, hwaddr offset, unsigned size)
{
uint32_t value = 0;
@@ -351,8 +356,9 @@ static void imx_spi_write(void *opaque, hwaddr offset, uint64_t value,
s->regs[ECSPI_CONREG] = value;
if (!imx_spi_is_enabled(s)) {
- /* device is disabled, so this is a reset */
- imx_spi_reset(DEVICE(s));
+ /* device is disabled, so this is a soft reset */
+ imx_spi_soft_reset(s);
+
return;
}
--
2.25.1
next prev parent reply other threads:[~2021-01-12 15:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-12 14:55 [PATCH v5 0/6] hw/ssi: imx_spi: Fix various bugs in the imx_spi model Bin Meng
2021-01-12 14:55 ` [PATCH v5 1/6] hw/ssi: imx_spi: Use a macro for number of chip selects supported Bin Meng
2021-01-12 14:55 ` Bin Meng [this message]
2021-01-12 14:55 ` [PATCH v5 3/6] hw/ssi: imx_spi: Disable chip selects when controller is disabled Bin Meng
2021-01-12 14:55 ` [PATCH v5 4/6] hw/ssi: imx_spi: Round up the burst length to be multiple of 8 Bin Meng
2021-01-12 14:55 ` [PATCH v5 5/6] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic Bin Meng
2021-01-12 14:55 ` [PATCH v5 6/6] hw/ssi: imx_spi: Correct tx and rx fifo endianness Bin Meng
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