* [PULL 01/10] pci/shpc: don't push attention button when ejecting powered-off device
2021-01-17 11:46 [PULL 00/10] pc,pci,virtio: fixes, features Michael S. Tsirkin
@ 2021-01-17 11:46 ` Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 02/10] vhost-user-fs: add the "bootindex" property Michael S. Tsirkin
` (9 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Michael S. Tsirkin @ 2021-01-17 11:46 UTC (permalink / raw)
To: qemu-devel; +Cc: Roman Kagan, Peter Maydell
From: Roman Kagan <rvkagan@yandex-team.ru>
When the slot is in steady powered-off state and the device is being
removed, there's no need to press the attention button. Nor is it
mandated by the Standard Hot-Plug Controller Specification, Rev. 1.0.
Moreover it confuses the guest, Linux in particular, as it assumes that
the attention button pressed in this state indicates that the device has
been inserted and will need to be powered on. Therefore it transitions
the slot into BLINKING_ON state for 5 seconds, and discovers at the end
that no device is actually inserted:
... unplug request
[12685.451329] shpchp 0000:01:00.0: Button pressed on Slot(2)
[12685.455478] shpchp 0000:01:00.0: PCI slot #2 - powering off due to button press
... in 5 seconds OS powers off the slot, QEMU ejects the device
[12690.632282] shpchp 0000:01:00.0: Latch open on Slot(2)
... excessive button press in steady powered-off state
[12690.634267] shpchp 0000:01:00.0: Button pressed on Slot(2)
[12690.636256] shpchp 0000:01:00.0: Card not present on Slot(2)
... the last button press spawns powering on the slot
[12690.638909] shpchp 0000:01:00.0: PCI slot #2 - powering on due to button press
... in 5 more seconds attempt to power on discovers empty slot
[12695.735986] shpchp 0000:01:00.0: No adapter on slot(2)
Worse, if the real device insertion happens within 5 seconds from the
apparent completion of the previous device removal (signaled via
DEVICE_DELETED event), the new button press will be interpreted as the
cancellation of that misguided powering on:
[13448.965295] shpchp 0000:01:00.0: Button pressed on Slot(2)
[13448.969430] shpchp 0000:01:00.0: PCI slot #2 - powering off due to button press
[13454.025107] shpchp 0000:01:00.0: Latch open on Slot(2)
[13454.027101] shpchp 0000:01:00.0: Button pressed on Slot(2)
[13454.029165] shpchp 0000:01:00.0: Card not present on Slot(2)
... the excessive button press spawns powering on the slot
... device has already been ejected by QEMU
[13454.031949] shpchp 0000:01:00.0: PCI slot #2 - powering on due to button press
... new device is inserted in the slot
[13456.861545] shpchp 0000:01:00.0: Latch close on Slot(2)
... valid button press arrives before 5 s since the wrong one
[13456.864894] shpchp 0000:01:00.0: Button pressed on Slot(2)
[13456.869211] shpchp 0000:01:00.0: Card present on Slot(2)
... the valid button press is counted as cancellation of the wrong one
[13456.873173] shpchp 0000:01:00.0: Button cancel on Slot(2)
[13456.877101] shpchp 0000:01:00.0: PCI slot #2 - action canceled due to button press
As a result, the newly inserted device isn't brought up by the guest.
Avoid this situation by not pushing the attention button when the device
in the slot is in powered-off state and is being ejected.
FWIW pcie implementation doesn't suffer from this problem.
Signed-off-by: Roman Kagan <rvkagan@yandex-team.ru>
Message-Id: <20201102053750.2281818-1-rvkagan@yandex-team.ru>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/pci/shpc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c
index 4786a44996..28e62174c4 100644
--- a/hw/pci/shpc.c
+++ b/hw/pci/shpc.c
@@ -300,7 +300,6 @@ static void shpc_slot_command(SHPCDevice *shpc, uint8_t target,
shpc_set_status(shpc, slot, SHPC_SLOT_STATUS_PRSNT_EMPTY,
SHPC_SLOT_STATUS_PRSNT_MASK);
shpc->config[SHPC_SLOT_EVENT_LATCH(slot)] |=
- SHPC_SLOT_EVENT_BUTTON |
SHPC_SLOT_EVENT_MRL |
SHPC_SLOT_EVENT_PRESENCE;
}
@@ -566,7 +565,6 @@ void shpc_device_unplug_request_cb(HotplugHandler *hotplug_dev,
return;
}
- shpc->config[SHPC_SLOT_EVENT_LATCH(slot)] |= SHPC_SLOT_EVENT_BUTTON;
state = shpc_get_status(shpc, slot, SHPC_SLOT_STATE_MASK);
led = shpc_get_status(shpc, slot, SHPC_SLOT_PWR_LED_MASK);
if (state == SHPC_STATE_DISABLED && led == SHPC_LED_OFF) {
@@ -577,6 +575,8 @@ void shpc_device_unplug_request_cb(HotplugHandler *hotplug_dev,
shpc->config[SHPC_SLOT_EVENT_LATCH(slot)] |=
SHPC_SLOT_EVENT_MRL |
SHPC_SLOT_EVENT_PRESENCE;
+ } else {
+ shpc->config[SHPC_SLOT_EVENT_LATCH(slot)] |= SHPC_SLOT_EVENT_BUTTON;
}
shpc_set_status(shpc, slot, 0, SHPC_SLOT_STATUS_66);
shpc_interrupt_update(pci_hotplug_dev);
--
MST
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PULL 02/10] vhost-user-fs: add the "bootindex" property
2021-01-17 11:46 [PULL 00/10] pc,pci,virtio: fixes, features Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 01/10] pci/shpc: don't push attention button when ejecting powered-off device Michael S. Tsirkin
@ 2021-01-17 11:46 ` Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 03/10] acpi: Allow DSDT acpi table changes Michael S. Tsirkin
` (8 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Michael S. Tsirkin @ 2021-01-17 11:46 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Ján Tomko, Dr. David Alan Gilbert, virtio-fs,
Stefan Hajnoczi, Laszlo Ersek
From: Laszlo Ersek <lersek@redhat.com>
virtio-fs qualifies as a bootable device minimally under OVMF, but
currently the necessary "bootindex" property is missing. Add the property.
Expose the property only in the PCI device, for now. There is no boot
support for virtiofs on s390x (ccw) for the time being [1] [2], so leave
the CCW device unchanged. Add the property to the base device still,
because adding the alias to the CCW device later will be easier this way
[3].
[1] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg01745.html
[2] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg01870.html
[3] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg01751.html
Example OpenFirmware device path for the "vhost-user-fs-pci" device in the
"bootorder" fw_cfg file:
/pci@i0cf8/pci-bridge@1,6/pci1af4,105a@0/filesystem@0
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Ján Tomko <jtomko@redhat.com>
Cc: Stefan Hajnoczi <stefanha@redhat.com>
Cc: virtio-fs@redhat.com
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <20210112131603.12686-1-lersek@redhat.com>
Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/virtio/vhost-user-fs.h | 1 +
hw/virtio/vhost-user-fs-pci.c | 2 ++
hw/virtio/vhost-user-fs.c | 10 ++++++++++
3 files changed, 13 insertions(+)
diff --git a/include/hw/virtio/vhost-user-fs.h b/include/hw/virtio/vhost-user-fs.h
index 6985752771..0d62834c25 100644
--- a/include/hw/virtio/vhost-user-fs.h
+++ b/include/hw/virtio/vhost-user-fs.h
@@ -39,6 +39,7 @@ struct VHostUserFS {
VhostUserState vhost_user;
VirtQueue **req_vqs;
VirtQueue *hiprio_vq;
+ int32_t bootindex;
/*< public >*/
};
diff --git a/hw/virtio/vhost-user-fs-pci.c b/hw/virtio/vhost-user-fs-pci.c
index 8bb389bd28..2ed8492b3f 100644
--- a/hw/virtio/vhost-user-fs-pci.c
+++ b/hw/virtio/vhost-user-fs-pci.c
@@ -68,6 +68,8 @@ static void vhost_user_fs_pci_instance_init(Object *obj)
virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
TYPE_VHOST_USER_FS);
+ object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev),
+ "bootindex");
}
static const VirtioPCIDeviceTypeInfo vhost_user_fs_pci_info = {
diff --git a/hw/virtio/vhost-user-fs.c b/hw/virtio/vhost-user-fs.c
index ed036ad9c1..ac4fc34b36 100644
--- a/hw/virtio/vhost-user-fs.c
+++ b/hw/virtio/vhost-user-fs.c
@@ -22,6 +22,7 @@
#include "qemu/error-report.h"
#include "hw/virtio/vhost-user-fs.h"
#include "monitor/monitor.h"
+#include "sysemu/sysemu.h"
static void vuf_get_config(VirtIODevice *vdev, uint8_t *config)
{
@@ -279,6 +280,14 @@ static Property vuf_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
+static void vuf_instance_init(Object *obj)
+{
+ VHostUserFS *fs = VHOST_USER_FS(obj);
+
+ device_add_bootindex_property(obj, &fs->bootindex, "bootindex",
+ "/filesystem@0", DEVICE(obj));
+}
+
static void vuf_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -300,6 +309,7 @@ static const TypeInfo vuf_info = {
.name = TYPE_VHOST_USER_FS,
.parent = TYPE_VIRTIO_DEVICE,
.instance_size = sizeof(VHostUserFS),
+ .instance_init = vuf_instance_init,
.class_init = vuf_class_init,
};
--
MST
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PULL 03/10] acpi: Allow DSDT acpi table changes
2021-01-17 11:46 [PULL 00/10] pc,pci,virtio: fixes, features Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 01/10] pci/shpc: don't push attention button when ejecting powered-off device Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 02/10] vhost-user-fs: add the "bootindex" property Michael S. Tsirkin
@ 2021-01-17 11:46 ` Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 04/10] acpi: Fix unmatched expected DSDT.pxb file Michael S. Tsirkin
` (7 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Michael S. Tsirkin @ 2021-01-17 11:46 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Jiahui Cen, Igor Mammedov
From: Jiahui Cen <cenjiahui@huawei.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-2-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..42418e58e7 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,6 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/microvm/DSDT.pcie",
+"tests/data/acpi/virt/DSDT",
+"tests/data/acpi/virt/DSDT.memhp",
+"tests/data/acpi/virt/DSDT.numamem",
+"tests/data/acpi/virt/DSDT.pxb",
--
MST
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PULL 04/10] acpi: Fix unmatched expected DSDT.pxb file
2021-01-17 11:46 [PULL 00/10] pc,pci,virtio: fixes, features Michael S. Tsirkin
` (2 preceding siblings ...)
2021-01-17 11:46 ` [PULL 03/10] acpi: Allow DSDT acpi table changes Michael S. Tsirkin
@ 2021-01-17 11:46 ` Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 05/10] acpi: Add addr offset in build_crs Michael S. Tsirkin
` (6 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Michael S. Tsirkin @ 2021-01-17 11:46 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Jiahui Cen, Igor Mammedov
From: Jiahui Cen <cenjiahui@huawei.com>
Commit fe1127da11 ("unit-test: Add the binary file and clear diff.h") does
not use the up-to-date expected file for pxb for ARM virt.
Fix the expected DSDT.pxb file.
Full diff of changed file disassembly:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 09:33:09 2021
+ * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:34:47 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001E7A (7802)
+ * Length 0x00001DF9 (7673)
* Revision 0x02
- * Checksum 0x57
+ * Checksum 0x42
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -45,32 +45,6 @@
})
}
- Device (FLS0)
- {
- Name (_HID, "LNRO0015") // _HID: Hardware ID
- Name (_UID, Zero) // _UID: Unique ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
- {
- Memory32Fixed (ReadWrite,
- 0x00000000, // Address Base
- 0x04000000, // Address Length
- )
- })
- }
-
- Device (FLS1)
- {
- Name (_HID, "LNRO0015") // _HID: Hardware ID
- Name (_UID, One) // _UID: Unique ID
- Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
- {
- Memory32Fixed (ReadWrite,
- 0x04000000, // Address Base
- 0x04000000, // Address Length
- )
- })
- }
-
Device (FWCF)
{
Name (_HID, "QEMU0002") // _HID: Hardware ID
@@ -665,9 +639,6 @@
{
Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID
Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID
- Name (_ADR, Zero) // _ADR: Address
- Name (_CCA, One) // _CCA: Cache Coherency Attribute
- Name (_SEG, Zero) // _SEG: PCI Segment
Name (_BBN, 0x80) // _BBN: BIOS Bus Number
Name (_UID, 0x80) // _UID: Unique ID
Name (_STR, Unicode ("pxb Device")) // _STR: Description String
@@ -1857,7 +1828,7 @@
Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID
Name (_SEG, Zero) // _SEG: PCI Segment
Name (_BBN, Zero) // _BBN: BIOS Bus Number
- Name (_UID, "PCI0") // _UID: Unique ID
+ Name (_UID, Zero) // _UID: Unique ID
Name (_STR, Unicode ("PCIe 0 Device")) // _STR: Description String
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_PRT, Package (0x80) // _PRT: PCI Routing Table
@@ -2983,41 +2954,37 @@
Return (0x0000004010000000)
}
- Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
- Return (ResourceTemplate ()
- {
- WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
- 0x0000, // Granularity
- 0x0000, // Range Minimum
- 0x007F, // Range Maximum
- 0x0000, // Translation Offset
- 0x0080, // Length
- ,, )
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x10000000, // Range Minimum
- 0x3EFEFFFF, // Range Maximum
- 0x00000000, // Translation Offset
- 0x2EFF0000, // Length
- ,, , AddressRangeMemory, TypeStatic)
- DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
- 0x00000000, // Granularity
- 0x00000000, // Range Minimum
- 0x0000FFFF, // Range Maximum
- 0x3EFF0000, // Translation Offset
- 0x00010000, // Length
- ,, , TypeStatic, DenseTranslation)
- QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
- 0x0000000000000000, // Granularity
- 0x0000008000000000, // Range Minimum
- 0x000000FFFFFFFFFF, // Range Maximum
- 0x0000000000000000, // Translation Offset
- 0x0000008000000000, // Length
- ,, , AddressRangeMemory, TypeStatic)
- })
- }
-
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, // Granularity
+ 0x0000, // Range Minimum
+ 0x007F, // Range Maximum
+ 0x0000, // Translation Offset
+ 0x0080, // Length
+ ,, )
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
+ 0x00000000, // Granularity
+ 0x10000000, // Range Minimum
+ 0x3EFEFFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x2EFF0000, // Length
+ ,, , AddressRangeMemory, TypeStatic)
+ DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+ 0x00000000, // Granularity
+ 0x00000000, // Range Minimum
+ 0x0000FFFF, // Range Maximum
+ 0x3EFF0000, // Translation Offset
+ 0x00010000, // Length
+ ,, , TypeStatic, DenseTranslation)
+ QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
+ 0x0000000000000000, // Granularity
+ 0x0000008000000000, // Range Minimum
+ 0x000000FFFFFFFFFF, // Range Maximum
+ 0x0000000000000000, // Translation Offset
+ 0x0000008000000000, // Length
+ ,, , AddressRangeMemory, TypeStatic)
+ })
Name (SUPP, Zero)
Name (CTRL, Zero)
Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
Fixes: fe1127da11 ("unit-test: Add the binary file and clear diff.h")
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-3-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/data/acpi/virt/DSDT.pxb | Bin 7802 -> 7673 bytes
1 file changed, 0 insertions(+), 0 deletions(-)
diff --git a/tests/data/acpi/virt/DSDT.pxb b/tests/data/acpi/virt/DSDT.pxb
index d5f0533a02d62bc2ae2db9b9de9484e5c06652fe..76f5f1c2fd487644c6b4f827a70ad770edb9fdc9 100644
GIT binary patch
delta 70
zcmV-M0J;DAJo!5cL{mgm`5gcN0z#1r8v=ygktblW?YIa6OPZ6X2_m!G35f{>PNz^q
cNt3DxACrg^53`&Ttq27OUqez;vr-%=0*oRUFaQ7m
delta 217
zcmexq{mX{SCD<jTN{)enDSRTAG*j!-iRuaUhHgH=1|0Doo-VvTenI{Q28N~#9Py!^
zE<n;bC|FRCi?5B7fsp|MSSlH!n?PC&v1wsM*TMqS1=eEW7Vhi@(GuwD8){%+U<5Qj
zIK*+|g83XwzOyGgaw_pVx&(nNb#?@r6YT1~If1i>lgWL><aa`bth@ovo(7xch1YU$
Qia3I;VOX;HqO=AR0CN5_Pyhe`
--
MST
^ permalink raw reply [flat|nested] 12+ messages in thread* [PULL 05/10] acpi: Add addr offset in build_crs
2021-01-17 11:46 [PULL 00/10] pc,pci,virtio: fixes, features Michael S. Tsirkin
` (3 preceding siblings ...)
2021-01-17 11:46 ` [PULL 04/10] acpi: Fix unmatched expected DSDT.pxb file Michael S. Tsirkin
@ 2021-01-17 11:46 ` Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 06/10] acpi/gpex: Inform os to keep firmware resource map Michael S. Tsirkin
` (5 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Michael S. Tsirkin @ 2021-01-17 11:46 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Jiahui Cen, Eduardo Habkost, Richard Henderson,
Igor Mammedov, Paolo Bonzini
From: Jiahui Cen <cenjiahui@huawei.com>
AML needs Address Translation offset to describe how a bridge translates
addresses accross the bridge when using an address descriptor, and
especially on ARM, the translation offset of pio resource is usually
non zero.
Therefore, it's necessary to pass offset for pio, mmio32, mmio64 and bus
number into build_crs.
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-4-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/acpi/aml-build.h | 4 +++-
hw/acpi/aml-build.c | 18 ++++++++++--------
hw/i386/acpi-build.c | 3 ++-
hw/pci-host/gpex-acpi.c | 3 ++-
4 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index e727bea1bc..54a5aec4d7 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -452,7 +452,9 @@ void crs_replace_with_free_ranges(GPtrArray *ranges,
void crs_range_set_init(CrsRangeSet *range_set);
void crs_range_set_free(CrsRangeSet *range_set);
-Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set);
+Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set, uint32_t io_offset,
+ uint32_t mmio32_offset, uint64_t mmio64_offset,
+ uint16_t bus_nr_offset);
void build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base,
uint64_t len, int node, MemoryAffinityFlags flags);
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index f976aa667b..7b6ebb0cc8 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -2076,7 +2076,9 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog)
tpm2_ptr, "TPM2", table_data->len - tpm2_start, 4, NULL, NULL);
}
-Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
+Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set, uint32_t io_offset,
+ uint32_t mmio32_offset, uint64_t mmio64_offset,
+ uint16_t bus_nr_offset)
{
Aml *crs = aml_resource_template();
CrsRangeSet temp_range_set;
@@ -2189,10 +2191,10 @@ Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
for (i = 0; i < temp_range_set.io_ranges->len; i++) {
entry = g_ptr_array_index(temp_range_set.io_ranges, i);
aml_append(crs,
- aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED,
- AML_POS_DECODE, AML_ENTIRE_RANGE,
- 0, entry->base, entry->limit, 0,
- entry->limit - entry->base + 1));
+ aml_dword_io(AML_MIN_FIXED, AML_MAX_FIXED,
+ AML_POS_DECODE, AML_ENTIRE_RANGE,
+ 0, entry->base, entry->limit, io_offset,
+ entry->limit - entry->base + 1));
crs_range_insert(range_set->io_ranges, entry->base, entry->limit);
}
@@ -2205,7 +2207,7 @@ Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
AML_MAX_FIXED, AML_NON_CACHEABLE,
AML_READ_WRITE,
- 0, entry->base, entry->limit, 0,
+ 0, entry->base, entry->limit, mmio32_offset,
entry->limit - entry->base + 1));
crs_range_insert(range_set->mem_ranges, entry->base, entry->limit);
}
@@ -2217,7 +2219,7 @@ Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED,
AML_MAX_FIXED, AML_NON_CACHEABLE,
AML_READ_WRITE,
- 0, entry->base, entry->limit, 0,
+ 0, entry->base, entry->limit, mmio64_offset,
entry->limit - entry->base + 1));
crs_range_insert(range_set->mem_64bit_ranges,
entry->base, entry->limit);
@@ -2230,7 +2232,7 @@ Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
0,
pci_bus_num(host->bus),
max_bus,
- 0,
+ bus_nr_offset,
max_bus - pci_bus_num(host->bus) + 1));
return crs;
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index f18b71dea9..f56d699c7f 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1360,7 +1360,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
}
aml_append(dev, build_prt(false));
- crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set);
+ crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set,
+ 0, 0, 0, 0);
aml_append(dev, aml_name_decl("_CRS", crs));
aml_append(scope, dev);
aml_append(dsdt, scope);
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index 7f20ee1c98..11b3db8f71 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -168,7 +168,8 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
* 1. The resources the pci-brige/pcie-root-port need.
* 2. The resources the devices behind pxb need.
*/
- crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set);
+ crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set,
+ cfg->pio.base, 0, 0, 0);
aml_append(dev, aml_name_decl("_CRS", crs));
acpi_dsdt_add_pci_osc(dev);
--
MST
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PULL 06/10] acpi/gpex: Inform os to keep firmware resource map
2021-01-17 11:46 [PULL 00/10] pc,pci,virtio: fixes, features Michael S. Tsirkin
` (4 preceding siblings ...)
2021-01-17 11:46 ` [PULL 05/10] acpi: Add addr offset in build_crs Michael S. Tsirkin
@ 2021-01-17 11:46 ` Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 07/10] acpi/gpex: Exclude pxb's resources from PCI0 Michael S. Tsirkin
` (4 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Michael S. Tsirkin @ 2021-01-17 11:46 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Jiahui Cen, Gerd Hoffmann, Yubo Miao,
Igor Mammedov
From: Jiahui Cen <cenjiahui@huawei.com>
There may be some differences in pci resource assignment between guest os
and firmware.
Eg. A Bridge with Bus [d2]
-+-[0000:d2]---01.0-[d3]----01.0
where [d2:01.00] is a pcie-pci-bridge with BAR0 (mem, 64-bit, non-pref) [size=256]
[d3:01.00] is a PCI Device with BAR0 (mem, 64-bit, pref) [size=128K]
BAR4 (mem, 64-bit, pref) [size=64M]
In EDK2, the Resource Map would be:
PciBus: Resource Map for Bridge [D2|01|00]
Type = PMem64; Base = 0x8004000000; Length = 0x4100000; Alignment = 0x3FFFFFF
Base = 0x8004000000; Length = 0x4000000; Alignment = 0x3FFFFFF; Owner = PCI [D3|01|00:20]
Base = 0x8008000000; Length = 0x20000; Alignment = 0x1FFFF; Owner = PCI [D3|01|00:10]
Type = Mem64; Base = 0x8008100000; Length = 0x100; Alignment = 0xFFF
It would use 0x4100000 to calculate the root bus's PMem64 resource window.
While in Linux, kernel will use 0x1FFFFFF as the alignment to calculate
the PMem64 size, which would be 0x6000000. So kernel would try to
allocate 0x6000000 from the PMem64 resource window, but since the window
size is 0x4100000 as assigned by EDK2, the allocation would fail.
The diffences could result in resource assignment failure.
Using _DSM #5 method to inform guest os not to ignore the PCI configuration
that firmware has done at boot time could handle the differences.
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-5-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/pci-host/gpex-acpi.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index 11b3db8f71..cb13e75d2f 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -112,10 +112,26 @@ static void acpi_dsdt_add_pci_osc(Aml *dev)
UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D");
ifctx = aml_if(aml_equal(aml_arg(0), UUID));
ifctx1 = aml_if(aml_equal(aml_arg(2), aml_int(0)));
- uint8_t byte_list[1] = {1};
- buf = aml_buffer(1, byte_list);
+ uint8_t byte_list[] = {
+ 0x1 << 0 /* support for functions other than function 0 */ |
+ 0x1 << 5 /* support for function 5 */
+ };
+ buf = aml_buffer(ARRAY_SIZE(byte_list), byte_list);
aml_append(ifctx1, aml_return(buf));
aml_append(ifctx, ifctx1);
+
+ /*
+ * PCI Firmware Specification 3.1
+ * 4.6.5. _DSM for Ignoring PCI Boot Configurations
+ */
+ /* Arg2: Function Index: 5 */
+ ifctx1 = aml_if(aml_equal(aml_arg(2), aml_int(5)));
+ /*
+ * 0 - The operating system must not ignore the PCI configuration that
+ * firmware has done at boot time.
+ */
+ aml_append(ifctx1, aml_return(aml_int(0)));
+ aml_append(ifctx, ifctx1);
aml_append(method, ifctx);
byte_list[0] = 0;
--
MST
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PULL 07/10] acpi/gpex: Exclude pxb's resources from PCI0
2021-01-17 11:46 [PULL 00/10] pc,pci,virtio: fixes, features Michael S. Tsirkin
` (5 preceding siblings ...)
2021-01-17 11:46 ` [PULL 06/10] acpi/gpex: Inform os to keep firmware resource map Michael S. Tsirkin
@ 2021-01-17 11:46 ` Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 08/10] Kconfig: Compile PXB for ARM_VIRT Michael S. Tsirkin
` (3 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Michael S. Tsirkin @ 2021-01-17 11:46 UTC (permalink / raw)
To: qemu-devel
Cc: Yubo Miao, Peter Maydell, Jiahui Cen, Gerd Hoffmann,
Igor Mammedov
From: Jiahui Cen <cenjiahui@huawei.com>
Exclude the resources of extra root bridges from PCI0's _CRS. Otherwise,
the resource windows would overlap in guest, and the IO resource window
would fail to be registered.
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-6-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/pci-host/gpex-acpi.c | 64 +++++++++++++++++++++++++++--------------
1 file changed, 43 insertions(+), 21 deletions(-)
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index cb13e75d2f..446912d771 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -146,6 +146,8 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
Aml *method, *crs, *dev, *rbuf;
PCIBus *bus = cfg->bus;
CrsRangeSet crs_range_set;
+ CrsRangeEntry *entry;
+ int i;
/* start to construct the tables for pxb */
crs_range_set_init(&crs_range_set);
@@ -193,7 +195,6 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
aml_append(scope, dev);
}
}
- crs_range_set_free(&crs_range_set);
/* tables for the main */
dev = aml_device("%s", "PCI0");
@@ -211,36 +212,55 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
aml_append(method, aml_return(aml_int(cfg->ecam.base)));
aml_append(dev, method);
+ /*
+ * At this point crs_range_set has all the ranges used by pci
+ * busses *other* than PCI0. These ranges will be excluded from
+ * the PCI0._CRS.
+ */
rbuf = aml_resource_template();
aml_append(rbuf,
aml_word_bus_number(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE,
0x0000, 0x0000, nr_pcie_buses - 1, 0x0000,
nr_pcie_buses));
if (cfg->mmio32.size) {
- aml_append(rbuf,
- aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
- AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000,
- cfg->mmio32.base,
- cfg->mmio32.base + cfg->mmio32.size - 1,
- 0x0000,
- cfg->mmio32.size));
+ crs_replace_with_free_ranges(crs_range_set.mem_ranges,
+ cfg->mmio32.base,
+ cfg->mmio32.base + cfg->mmio32.size - 1);
+ for (i = 0; i < crs_range_set.mem_ranges->len; i++) {
+ entry = g_ptr_array_index(crs_range_set.mem_ranges, i);
+ aml_append(rbuf,
+ aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
+ AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000,
+ entry->base, entry->limit,
+ 0x0000, entry->limit - entry->base + 1));
+ }
}
if (cfg->pio.size) {
- aml_append(rbuf,
- aml_dword_io(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE,
- AML_ENTIRE_RANGE, 0x0000, 0x0000,
- cfg->pio.size - 1,
- cfg->pio.base,
- cfg->pio.size));
+ crs_replace_with_free_ranges(crs_range_set.io_ranges,
+ 0x0000,
+ cfg->pio.size - 1);
+ for (i = 0; i < crs_range_set.io_ranges->len; i++) {
+ entry = g_ptr_array_index(crs_range_set.io_ranges, i);
+ aml_append(rbuf,
+ aml_dword_io(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE,
+ AML_ENTIRE_RANGE, 0x0000, entry->base,
+ entry->limit, cfg->pio.base,
+ entry->limit - entry->base + 1));
+ }
}
if (cfg->mmio64.size) {
- aml_append(rbuf,
- aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
- AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000,
- cfg->mmio64.base,
- cfg->mmio64.base + cfg->mmio64.size - 1,
- 0x0000,
- cfg->mmio64.size));
+ crs_replace_with_free_ranges(crs_range_set.mem_64bit_ranges,
+ cfg->mmio64.base,
+ cfg->mmio64.base + cfg->mmio64.size - 1);
+ for (i = 0; i < crs_range_set.mem_64bit_ranges->len; i++) {
+ entry = g_ptr_array_index(crs_range_set.mem_64bit_ranges, i);
+ aml_append(rbuf,
+ aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
+ AML_NON_CACHEABLE, AML_READ_WRITE, 0x0000,
+ entry->base,
+ entry->limit, 0x0000,
+ entry->limit - entry->base + 1));
+ }
}
aml_append(dev, aml_name_decl("_CRS", rbuf));
@@ -259,4 +279,6 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
aml_append(dev_res0, aml_name_decl("_CRS", crs));
aml_append(dev, dev_res0);
aml_append(scope, dev);
+
+ crs_range_set_free(&crs_range_set);
}
--
MST
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PULL 08/10] Kconfig: Compile PXB for ARM_VIRT
2021-01-17 11:46 [PULL 00/10] pc,pci,virtio: fixes, features Michael S. Tsirkin
` (6 preceding siblings ...)
2021-01-17 11:46 ` [PULL 07/10] acpi/gpex: Exclude pxb's resources from PCI0 Michael S. Tsirkin
@ 2021-01-17 11:46 ` Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 09/10] acpi: Enable pxb unit-test for ARM virt machine Michael S. Tsirkin
` (2 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Michael S. Tsirkin @ 2021-01-17 11:46 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Jiahui Cen, Igor Mammedov
From: Jiahui Cen <cenjiahui@huawei.com>
PXB is now supported on ARM, so let's compile for arm_virt machine.
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-7-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/pci-bridge/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-bridge/Kconfig b/hw/pci-bridge/Kconfig
index a51ec716f5..f8df4315ba 100644
--- a/hw/pci-bridge/Kconfig
+++ b/hw/pci-bridge/Kconfig
@@ -5,7 +5,7 @@ config PCIE_PORT
config PXB
bool
- default y if Q35
+ default y if Q35 || ARM_VIRT
config XIO3130
bool
--
MST
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PULL 09/10] acpi: Enable pxb unit-test for ARM virt machine
2021-01-17 11:46 [PULL 00/10] pc,pci,virtio: fixes, features Michael S. Tsirkin
` (7 preceding siblings ...)
2021-01-17 11:46 ` [PULL 08/10] Kconfig: Compile PXB for ARM_VIRT Michael S. Tsirkin
@ 2021-01-17 11:46 ` Michael S. Tsirkin
2021-01-17 11:46 ` [PULL 10/10] acpi: Update _DSM method in expected files Michael S. Tsirkin
2021-01-18 10:28 ` [PULL 00/10] pc,pci,virtio: fixes, features Peter Maydell
10 siblings, 0 replies; 12+ messages in thread
From: Michael S. Tsirkin @ 2021-01-17 11:46 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Jiahui Cen, Igor Mammedov
From: Jiahui Cen <cenjiahui@huawei.com>
No matter whether the pxb is enabled or not, the CONFIG_PXB macro in test
would keep undefined. And since pxb is now enabled for ARM Virt machine
by default, let's enable pxb unit-test by removing the CONFIG_PXB.
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-8-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 4e026f90d0..669202fc95 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1196,7 +1196,6 @@ static void test_acpi_virt_tcg_numamem(void)
}
-#ifdef CONFIG_PXB
static void test_acpi_virt_tcg_pxb(void)
{
test_data data = {
@@ -1228,7 +1227,6 @@ static void test_acpi_virt_tcg_pxb(void)
free_test_data(&data);
}
-#endif
static void test_acpi_tcg_acpi_hmat(const char *machine)
{
@@ -1342,9 +1340,7 @@ int main(int argc, char *argv[])
qtest_add_func("acpi/virt", test_acpi_virt_tcg);
qtest_add_func("acpi/virt/numamem", test_acpi_virt_tcg_numamem);
qtest_add_func("acpi/virt/memhp", test_acpi_virt_tcg_memhp);
-#ifdef CONFIG_PXB
qtest_add_func("acpi/virt/pxb", test_acpi_virt_tcg_pxb);
-#endif
}
ret = g_test_run();
boot_sector_cleanup(disk);
--
MST
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PULL 10/10] acpi: Update _DSM method in expected files
2021-01-17 11:46 [PULL 00/10] pc,pci,virtio: fixes, features Michael S. Tsirkin
` (8 preceding siblings ...)
2021-01-17 11:46 ` [PULL 09/10] acpi: Enable pxb unit-test for ARM virt machine Michael S. Tsirkin
@ 2021-01-17 11:46 ` Michael S. Tsirkin
2021-01-18 10:28 ` [PULL 00/10] pc,pci,virtio: fixes, features Peter Maydell
10 siblings, 0 replies; 12+ messages in thread
From: Michael S. Tsirkin @ 2021-01-17 11:46 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Jiahui Cen, Igor Mammedov
From: Jiahui Cen <cenjiahui@huawei.com>
A new _DSM #5 method is added.
Update expected DSDT files accordingly, and re-enable their testing.
Full diff of changed files disassembly:
tests/data/acpi/microvm/DSDT.pcie.dsl:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Thu Jan 14 13:39:35 2021
+ * Disassembly of tests/data/acpi/microvm/DSDT.pcie, Thu Jan 14 13:51:13 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00000BCF (3023)
+ * Length 0x00000BD7 (3031)
* Revision 0x02
- * Checksum 0x29
+ * Checksum 0x99
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -1302,9 +1302,14 @@
{
Return (Buffer (One)
{
- 0x01 // .
+ 0x21 // !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
tests/data/acpi/virt/DSDT.dsl:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT, Thu Jan 14 13:39:35 2021
+ * Disassembly of tests/data/acpi/virt/DSDT, Thu Jan 14 13:51:13 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x0000144C (5196)
+ * Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0xF0
+ * Checksum 0x60
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -1838,9 +1838,14 @@
{
Return (Buffer (One)
{
- 0x01 // .
+ 0x21 // !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
tests/data/acpi/virt/DSDT.memhp.dsl:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.memhp, Thu Jan 14 13:39:35 2021
+ * Disassembly of tests/data/acpi/virt/DSDT.memhp, Thu Jan 14 13:51:13 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x0000199D (6557)
+ * Length 0x000019A5 (6565)
* Revision 0x02
- * Checksum 0x11
+ * Checksum 0x90
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -1840,9 +1840,14 @@
{
Return (Buffer (One)
{
- 0x01 // .
+ 0x21 // !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
tests/data/acpi/virt/DSDT.numamem.dsl:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.numamem, Thu Jan 14 13:39:35 2021
+ * Disassembly of tests/data/acpi/virt/DSDT.numamem, Thu Jan 14 13:51:13 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x0000144C (5196)
+ * Length 0x00001454 (5204)
* Revision 0x02
- * Checksum 0xF0
+ * Checksum 0x60
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -1838,9 +1838,14 @@
{
Return (Buffer (One)
{
- 0x01 // .
+ 0x21 // !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
tests/data/acpi/virt/DSDT.pxb.dsl:
@@ -5,13 +5,13 @@
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:39:35 2021
+ * Disassembly of tests/data/acpi/virt/DSDT.pxb, Thu Jan 14 13:51:13 2021
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001DF9 (7673)
+ * Length 0x00001E09 (7689)
* Revision 0x02
- * Checksum 0x42
+ * Checksum 0x30
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
@@ -1810,9 +1810,14 @@
{
Return (Buffer (One)
{
- 0x01 // .
+ 0x21 // !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
@@ -3025,9 +3030,14 @@
{
Return (Buffer (One)
{
- 0x01 // .
+ 0x21 // !
})
}
+
+ If ((Arg2 == 0x05))
+ {
+ Return (Zero)
+ }
}
Return (Buffer (One)
Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
Message-Id: <20210114100643.10617-9-cenjiahui@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 5 -----
tests/data/acpi/microvm/DSDT.pcie | Bin 3023 -> 3031 bytes
tests/data/acpi/virt/DSDT | Bin 5196 -> 5204 bytes
tests/data/acpi/virt/DSDT.memhp | Bin 6557 -> 6565 bytes
tests/data/acpi/virt/DSDT.numamem | Bin 5196 -> 5204 bytes
tests/data/acpi/virt/DSDT.pxb | Bin 7673 -> 7689 bytes
6 files changed, 5 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index 42418e58e7..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,6 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/microvm/DSDT.pcie",
-"tests/data/acpi/virt/DSDT",
-"tests/data/acpi/virt/DSDT.memhp",
-"tests/data/acpi/virt/DSDT.numamem",
-"tests/data/acpi/virt/DSDT.pxb",
diff --git a/tests/data/acpi/microvm/DSDT.pcie b/tests/data/acpi/microvm/DSDT.pcie
index 4b765541e372f4ba4e25529c14acf696516c8f61..e590b98f9960025f75dd0544492d3088781406dc 100644
GIT binary patch
delta 59
zcmV-B0L1^#7uOdGL{mgm*9!mu0-2Et8v;SPu_reH0Z6l70pke>HD5$iO$4ARlS&I8
R2_c{dlWGbDqyUp@3uOk*5ZC|!
delta 51
zcmcaEeqNl*CD<k8JU0UaljcM&X(rE|8`aGj867sqGd||z(2aKq_GMY1IN6I^o{@2K
H5qBy8b(js<
diff --git a/tests/data/acpi/virt/DSDT b/tests/data/acpi/virt/DSDT
index bc519abff9cadc1552e4e586b0a3f5f0db498f4a..ea8a0869af1637ab75fe335e100256a2acf85e16 100644
GIT binary patch
delta 58
zcmX@3aYcj6CD<h-M1+BXDPba)G-LlpHAzk;w-t*WIk`AY<6VM%Sr%wc_7s-qR9wJ5
OIg5*R3B%+};l}{T<qzlp
delta 50
zcmcbjaYlp7CD<jzM}&ca>BB@WX~y=AYLc8xe#;j-a&mF##=8XjvMf-X>?thI$T+!B
G_%Q%yeGTXU
diff --git a/tests/data/acpi/virt/DSDT.memhp b/tests/data/acpi/virt/DSDT.memhp
index 54728e2b4b8b959f3f829386f6a388ef2600e747..897648637cc6c8af47c67a9a349477c0240f833b 100644
GIT binary patch
delta 60
zcmV-C0K@;CGo>>ML{mgmr5OMK0+5jk8v=lsu_qV_0!FB#K?w>7HD5$iO$4ARlSvaF
S2_c{dlWGbDqyV#N6Ep_<;t(eQ
delta 52
zcmZ2#JlB}ZCD<iot|S8kli)-yX{L_p8`UK^nf#V7cI4#Z(2aKq_GMY1IN4KJo{@2L
Ip|A-X0Bmp#CjbBd
diff --git a/tests/data/acpi/virt/DSDT.numamem b/tests/data/acpi/virt/DSDT.numamem
index bc519abff9cadc1552e4e586b0a3f5f0db498f4a..ea8a0869af1637ab75fe335e100256a2acf85e16 100644
GIT binary patch
delta 58
zcmX@3aYcj6CD<h-M1+BXDPba)G-LlpHAzk;w-t*WIk`AY<6VM%Sr%wc_7s-qR9wJ5
OIg5*R3B%+};l}{T<qzlp
delta 50
zcmcbjaYlp7CD<jzM}&ca>BB@WX~y=AYLc8xe#;j-a&mF##=8XjvMf-X>?thI$T+!B
G_%Q%yeGTXU
diff --git a/tests/data/acpi/virt/DSDT.pxb b/tests/data/acpi/virt/DSDT.pxb
index 76f5f1c2fd487644c6b4f827a70ad770edb9fdc9..ce3b67dff277e23f43925b1adcbb55c9d0b4eee3 100644
GIT binary patch
delta 95
zcmexq-D$(+66_MfDaXLTWH6CShVkA;bqP);=h>SbIcqpMOygaGeOVT0PW~n%FQmAD
ieR38T>k@_~g3OEz(M@hE7QYkXLQ%sBS2I~m_AvnX%^QRO
delta 79
zcmeCQ`DxAN66_N4Q<i~&$!Q{&4CCF6>Jpqx-m^A4a@KHi=*GJQ`?4%hocvElo{Mpb
ZATuLFbd%rm#ovUuP~;dHC#%Um1^}tB7n}e9
--
MST
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PULL 00/10] pc,pci,virtio: fixes, features
2021-01-17 11:46 [PULL 00/10] pc,pci,virtio: fixes, features Michael S. Tsirkin
` (9 preceding siblings ...)
2021-01-17 11:46 ` [PULL 10/10] acpi: Update _DSM method in expected files Michael S. Tsirkin
@ 2021-01-18 10:28 ` Peter Maydell
10 siblings, 0 replies; 12+ messages in thread
From: Peter Maydell @ 2021-01-18 10:28 UTC (permalink / raw)
To: Michael S. Tsirkin; +Cc: QEMU Developers
On Sun, 17 Jan 2021 at 11:46, Michael S. Tsirkin <mst@redhat.com> wrote:
>
> The following changes since commit f8e1d8852e393b3fd524fb005e38590063d99bc0:
>
> Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210112-1' into staging (2021-01-12 21:23:25 +0000)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
>
> for you to fetch changes up to ccee1a8140211c569156ae649474cc520eb2a36b:
>
> acpi: Update _DSM method in expected files (2021-01-17 06:42:54 -0500)
>
> ----------------------------------------------------------------
> pc,pci,virtio: fixes, features
>
> Fixes all over the place.
> PXB support for ARM.
> boot index for vhost-user-fs.
>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/6.0
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 12+ messages in thread