qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Klaus Jensen <its@irrelevant.dk>
To: qemu-devel@nongnu.org
Cc: Fam Zheng <fam@euphon.net>, Kevin Wolf <kwolf@redhat.com>,
	qemu-block@nongnu.org, Klaus Jensen <k.jensen@samsung.com>,
	Max Reitz <mreitz@redhat.com>, Klaus Jensen <its@irrelevant.dk>,
	Stefan Hajnoczi <stefanha@redhat.com>,
	Keith Busch <kbusch@kernel.org>
Subject: [PATCH v2 07/12] hw/block/nvme: remove redundant zeroing of PMR registers
Date: Mon, 18 Jan 2021 10:47:00 +0100	[thread overview]
Message-ID: <20210118094705.56772-8-its@irrelevant.dk> (raw)
In-Reply-To: <20210118094705.56772-1-its@irrelevant.dk>

From: Klaus Jensen <k.jensen@samsung.com>

The controller registers are initially zero. Remove the redundant
zeroing.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
---
 hw/block/nvme.c | 35 -----------------------------------
 1 file changed, 35 deletions(-)

diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index f3bea582b3c0..9ee9570bb65c 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -4179,43 +4179,8 @@ static void nvme_init_cmb(NvmeCtrl *n, PCIDevice *pci_dev)
 
 static void nvme_init_pmr(NvmeCtrl *n, PCIDevice *pci_dev)
 {
-    /* PMR Capabities register */
-    n->bar.pmrcap = 0;
-    NVME_PMRCAP_SET_RDS(n->bar.pmrcap, 0);
-    NVME_PMRCAP_SET_WDS(n->bar.pmrcap, 0);
     NVME_PMRCAP_SET_BIR(n->bar.pmrcap, NVME_PMR_BIR);
-    NVME_PMRCAP_SET_PMRTU(n->bar.pmrcap, 0);
-    /* Turn on bit 1 support */
     NVME_PMRCAP_SET_PMRWBM(n->bar.pmrcap, 0x02);
-    NVME_PMRCAP_SET_PMRTO(n->bar.pmrcap, 0);
-    NVME_PMRCAP_SET_CMSS(n->bar.pmrcap, 0);
-
-    /* PMR Control register */
-    n->bar.pmrctl = 0;
-    NVME_PMRCTL_SET_EN(n->bar.pmrctl, 0);
-
-    /* PMR Status register */
-    n->bar.pmrsts = 0;
-    NVME_PMRSTS_SET_ERR(n->bar.pmrsts, 0);
-    NVME_PMRSTS_SET_NRDY(n->bar.pmrsts, 0);
-    NVME_PMRSTS_SET_HSTS(n->bar.pmrsts, 0);
-    NVME_PMRSTS_SET_CBAI(n->bar.pmrsts, 0);
-
-    /* PMR Elasticity Buffer Size register */
-    n->bar.pmrebs = 0;
-    NVME_PMREBS_SET_PMRSZU(n->bar.pmrebs, 0);
-    NVME_PMREBS_SET_RBB(n->bar.pmrebs, 0);
-    NVME_PMREBS_SET_PMRWBZ(n->bar.pmrebs, 0);
-
-    /* PMR Sustained Write Throughput register */
-    n->bar.pmrswtp = 0;
-    NVME_PMRSWTP_SET_PMRSWTU(n->bar.pmrswtp, 0);
-    NVME_PMRSWTP_SET_PMRSWTV(n->bar.pmrswtp, 0);
-
-    /* PMR Memory Space Control register */
-    n->bar.pmrmsc = 0;
-    NVME_PMRMSC_SET_CMSE(n->bar.pmrmsc, 0);
-    NVME_PMRMSC_SET_CBA(n->bar.pmrmsc, 0);
 
     pci_register_bar(pci_dev, NVME_PMRCAP_BIR(n->bar.pmrcap),
                      PCI_BASE_ADDRESS_SPACE_MEMORY |
-- 
2.30.0



  parent reply	other threads:[~2021-01-18 10:03 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-18  9:46 [PATCH v2 00/12] hw/block/nvme: misc cmb/pmr patches and bump to v1.4 Klaus Jensen
2021-01-18  9:46 ` [PATCH v2 01/12] hw/block/nvme: add size to mmio read/write trace events Klaus Jensen
2021-01-18 12:29   ` Minwoo Im
2021-01-18  9:46 ` [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes Klaus Jensen
2021-01-18 12:41   ` Minwoo Im
2021-01-18 12:53     ` Klaus Jensen
2021-01-18 12:59       ` Minwoo Im
2021-01-18 19:53         ` Klaus Jensen
2021-01-19  2:09           ` Minwoo Im
2021-01-19 18:58           ` Keith Busch
2021-01-18  9:46 ` [PATCH v2 03/12] hw/block/nvme: indicate CMB support through controller capabilities register Klaus Jensen
2021-01-18 12:42   ` Minwoo Im
2021-01-18  9:46 ` [PATCH v2 04/12] hw/block/nvme: move msix table and pba to BAR 0 Klaus Jensen
2021-01-18 12:48   ` Minwoo Im
2021-01-18  9:46 ` [PATCH v2 05/12] hw/block/nvme: allow cmb and pmr to coexist Klaus Jensen
2021-01-18 12:50   ` Minwoo Im
2021-01-18  9:46 ` [PATCH v2 06/12] hw/block/nvme: rename PMR/CMB shift/mask fields Klaus Jensen
2021-01-18 12:52   ` Minwoo Im
2021-01-18  9:47 ` Klaus Jensen [this message]
2021-01-18 12:55   ` [PATCH v2 07/12] hw/block/nvme: remove redundant zeroing of PMR registers Minwoo Im
2021-01-18 13:02     ` Klaus Jensen
2021-01-18  9:47 ` [PATCH v2 08/12] hw/block/nvme: disable PMR at boot up Klaus Jensen
2021-01-18  9:47 ` [PATCH v2 09/12] hw/block/nvme: add PMR RDS/WDS support Klaus Jensen
2021-01-18  9:47 ` [PATCH v2 10/12] hw/block/nvme: move cmb logic to v1.4 Klaus Jensen
2021-01-18 12:58   ` Minwoo Im
2021-01-18 13:04     ` Klaus Jensen
2021-01-18 13:09       ` Minwoo Im
2021-01-18 13:10         ` Klaus Jensen
2021-01-18 13:12           ` Minwoo Im
2021-01-18 13:22             ` Klaus Jensen
2021-01-18 19:23               ` Klaus Jensen
2021-01-19  2:11                 ` Minwoo Im
2021-01-18  9:47 ` [PATCH v2 11/12] hw/block/nvme: bump " Klaus Jensen
2021-01-18  9:47 ` [PATCH v2 12/12] hw/block/nvme: lift cmb restrictions Klaus Jensen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210118094705.56772-8-its@irrelevant.dk \
    --to=its@irrelevant.dk \
    --cc=fam@euphon.net \
    --cc=k.jensen@samsung.com \
    --cc=kbusch@kernel.org \
    --cc=kwolf@redhat.com \
    --cc=mreitz@redhat.com \
    --cc=qemu-block@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=stefanha@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).