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[217.232.58.237]) by smtp.gmail.com with ESMTPSA id z14sm540833wrm.5.2021.01.19.00.36.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 00:36:57 -0800 (PST) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 07/11] hw/m68k/next-cube: Make next_irq GPIO inputs to NEXT_PC device Date: Tue, 19 Jan 2021 09:36:13 +0100 Message-Id: <20210119083617.6337-8-huth@tuxfamily.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210119083617.6337-1-huth@tuxfamily.org> References: <20210119083617.6337-1-huth@tuxfamily.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=209.85.128.44; envelope-from=th.huth@gmail.com; helo=mail-wm1-f44.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Make the next_irq function be GPIO inputs to the NEXT_PC device, rather than a freestanding set of qemu_irq lines. This fixes a minor Coverity issue where it correctly points out the trivial memory leak of the memory allocated in the call to qemu_allocate_irqs(). Fixes: CID 1421962 Signed-off-by: Peter Maydell Message-Id: <20210115201206.17347-8-peter.maydell@linaro.org> Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 21 ++++----------------- include/hw/m68k/next-cube.h | 3 ++- 2 files changed, 6 insertions(+), 18 deletions(-) diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 9b9b051231..7dcd39aab9 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -735,10 +735,6 @@ static const MemoryRegionOps dma_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -/* - * TODO: set the shift numbers as values in the enum, so the first switch - * will not be needed - */ static void next_irq(void *opaque, int number, int level) { NeXTPC *s = NEXT_PC(opaque); @@ -839,19 +835,8 @@ static void next_irq(void *opaque, int number, int level) } } -static void next_serial_irq(void *opaque, int n, int level) -{ - /* DPRINTF("SCC IRQ NUM %i\n",n); */ - if (n) { - next_irq(opaque, NEXT_SCC_DMA_I, level); - } else { - next_irq(opaque, NEXT_SCC_I, level); - } -} - static void next_escc_init(DeviceState *pcdev) { - qemu_irq *ser_irq = qemu_allocate_irqs(next_serial_irq, pcdev, 2); DeviceState *dev; SysBusDevice *s; @@ -867,8 +852,8 @@ static void next_escc_init(DeviceState *pcdev) s = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); - sysbus_connect_irq(s, 0, ser_irq[0]); - sysbus_connect_irq(s, 1, ser_irq[1]); + sysbus_connect_irq(s, 0, qdev_get_gpio_in(pcdev, NEXT_SCC_I)); + sysbus_connect_irq(s, 1, qdev_get_gpio_in(pcdev, NEXT_SCC_DMA_I)); sysbus_mmio_map(s, 0, 0x2118000); } @@ -887,6 +872,8 @@ static void next_pc_realize(DeviceState *dev, Error **errp) NeXTPC *s = NEXT_PC(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + qdev_init_gpio_in(dev, next_irq, NEXT_NUM_IRQS); + memory_region_init_io(&s->mmiomem, OBJECT(s), &mmio_ops, s, "next.mmio", 0xD0000); memory_region_init_io(&s->scrmem, OBJECT(s), &scr_ops, s, diff --git a/include/hw/m68k/next-cube.h b/include/hw/m68k/next-cube.h index 5a56c354b8..d38c52d540 100644 --- a/include/hw/m68k/next-cube.h +++ b/include/hw/m68k/next-cube.h @@ -39,7 +39,8 @@ enum next_irqs { NEXT_ENRX_DMA_I, NEXT_SCSI_DMA_I, NEXT_SCC_DMA_I, - NEXT_SND_I + NEXT_SND_I, + NEXT_NUM_IRQS }; #endif /* NEXT_CUBE_H */ -- 2.29.2