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[66.75.72.126]) by smtp.gmail.com with ESMTPSA id a136sm20651359pfd.149.2021.01.19.10.34.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Jan 2021 10:34:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 4/5] tcg: Adjust tcgv_*_temp/temp_tcgv_* Date: Tue, 19 Jan 2021 08:34:27 -1000 Message-Id: <20210119183428.556706-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210119183428.556706-1-richard.henderson@linaro.org> References: <20210119183428.556706-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, alistair23@gmail.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Encode the index of the temporary within the "pointer" rather than its offset. This breaks a tie with a statically allocated array of temps. Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 34 +++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 11 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 4d001fed39..996addd90c 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -757,6 +757,11 @@ static inline size_t temp_idx(TCGTemp *ts) return ts->index; } +/* + * TCGArg is a convenience for TCGOps, and never exist outside of + * code generation with a specific TCGContext. Simply store the + * pointer value within the TCGArg. + */ static inline TCGArg temp_arg(TCGTemp *ts) { return (uintptr_t)ts; @@ -767,15 +772,15 @@ static inline TCGTemp *arg_temp(TCGArg a) return (TCGTemp *)(uintptr_t)a; } -/* Using the offset of a temporary, relative to TCGContext, rather than - its index means that we don't use 0. That leaves offset 0 free for - a NULL representation without having to leave index 0 unused. */ +/* + * TCGv_{i32,i64,ptr,vec} must be independent of TCGContext, + * so that the globals that we allocate at startup are valid for + * the thread-specfic TCGContext when we generate code. + * Reserve 0 for NULL, and use the temp index + 1 otherwise. + */ static inline TCGTemp *tcgv_i32_temp(TCGv_i32 v) { - uintptr_t o = (uintptr_t)v; - TCGTemp *t = (void *)tcg_ctx + o; - tcg_debug_assert(offsetof(TCGContext, temps[temp_idx(t)]) == o); - return t; + return v ? tcg_temp(tcg_ctx, (uintptr_t)v - 1) : NULL; } static inline TCGTemp *tcgv_i64_temp(TCGv_i64 v) @@ -815,8 +820,7 @@ static inline TCGArg tcgv_vec_arg(TCGv_vec v) static inline TCGv_i32 temp_tcgv_i32(TCGTemp *t) { - (void)temp_idx(t); /* trigger embedded assert */ - return (TCGv_i32)((void *)t - (void *)tcg_ctx); + return (TCGv_i32)(t ? (uintptr_t)temp_idx(t) + 1 : 0); } static inline TCGv_i64 temp_tcgv_i64(TCGTemp *t) @@ -837,12 +841,20 @@ static inline TCGv_vec temp_tcgv_vec(TCGTemp *t) #if TCG_TARGET_REG_BITS == 32 static inline TCGv_i32 TCGV_LOW(TCGv_i64 t) { - return temp_tcgv_i32(tcgv_i64_temp(t)); + /* + * The 64-bit value is a pair of TCGv_i32, with the low part at index 0. + * Since we're encoding the index in @t, pass it through unchanged. + */ + return (TCGv_i32)t; } static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t) { - return temp_tcgv_i32(tcgv_i64_temp(t) + 1); + /* + * The 64-bit value is a pair of TCGv_i32, with the high part at index 1. + * Since we're encoding the index in @t, add one. + */ + return (TCGv_i32)((uintptr_t)t + 1); } #endif -- 2.25.1