qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Bin Meng <bmeng.cn@gmail.com>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Alistair Francis" <alistair.francis@wdc.com>,
	qemu-block@nongnu.org, qemu-riscv@nongnu.org,
	qemu-devel@nongnu.org
Cc: Bin Meng <bin.meng@windriver.com>
Subject: [PATCH v2 02/25] hw/block: m25p80: Add various ISSI flash information
Date: Sat, 23 Jan 2021 18:39:53 +0800	[thread overview]
Message-ID: <20210123104016.17485-3-bmeng.cn@gmail.com> (raw)
In-Reply-To: <20210123104016.17485-1-bmeng.cn@gmail.com>

From: Bin Meng <bin.meng@windriver.com>

This updates the flash information table to include various ISSI
flashes that are supported by upstream U-Boot and Linux kernel.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
---

(no changes since v1)

 hw/block/m25p80.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 217c130f56..4bf8aa8158 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -210,6 +210,19 @@ static const FlashPartInfo known_devices[] = {
     { INFO("640s33b",     0x898913,      0,  64 << 10, 128, 0) },
     { INFO("n25q064",     0x20ba17,      0,  64 << 10, 128, 0) },
 
+    /* ISSI */
+    { INFO("is25lq040b",  0x9d4013,      0,  64 << 10,   8, ER_4K) },
+    { INFO("is25lp080d",  0x9d6014,      0,  64 << 10,  16, ER_4K) },
+    { INFO("is25lp016d",  0x9d6015,      0,  64 << 10,  32, ER_4K) },
+    { INFO("is25lp032",   0x9d6016,      0,  64 << 10,  64, ER_4K) },
+    { INFO("is25lp064",   0x9d6017,      0,  64 << 10, 128, ER_4K) },
+    { INFO("is25lp128",   0x9d6018,      0,  64 << 10, 256, ER_4K) },
+    { INFO("is25lp256",   0x9d6019,      0,  64 << 10, 512, ER_4K) },
+    { INFO("is25wp032",   0x9d7016,      0,  64 << 10,  64, ER_4K) },
+    { INFO("is25wp064",   0x9d7017,      0,  64 << 10, 128, ER_4K) },
+    { INFO("is25wp128",   0x9d7018,      0,  64 << 10, 256, ER_4K) },
+    { INFO("is25wp256",   0x9d7019,      0,  64 << 10, 512, ER_4K) },
+
     /* Macronix */
     { INFO("mx25l2005a",  0xc22012,      0,  64 << 10,   4, ER_4K) },
     { INFO("mx25l4005a",  0xc22013,      0,  64 << 10,   8, ER_4K) },
-- 
2.25.1



  parent reply	other threads:[~2021-01-23 10:49 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-23 10:39 [PATCH v2 00/25] hw/riscv: sifive_u: Add missing SPI support Bin Meng
2021-01-23 10:39 ` [PATCH v2 01/25] hw/block: m25p80: Add ISSI SPI flash support Bin Meng
2021-01-23 10:39 ` Bin Meng [this message]
2021-01-23 10:39 ` [PATCH v2 03/25] hw/sd: ssi-sd: Fix incorrect card response sequence Bin Meng
2021-01-24 17:48   ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 04/25] hw/sd: sd: Support CMD59 for SPI mode Bin Meng
2021-01-24 17:21   ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 05/25] hw/sd: sd: Drop sd_crc16() Bin Meng
2021-01-24 18:14   ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 06/25] util: Add CRC16 (CCITT) calculation routines Bin Meng
2021-01-24 18:59   ` Philippe Mathieu-Daudé
2021-01-24 20:07     ` Richard Henderson
2021-01-24 20:24       ` Philippe Mathieu-Daudé
2021-01-24 21:41         ` Richard Henderson
2021-01-26  7:44           ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 07/25] hw/sd: ssi-sd: Suffix a data block with CRC16 Bin Meng
2021-01-24 18:57   ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 08/25] hw/sd: ssi-sd: Add a state representing Nac Bin Meng
2021-01-24 17:26   ` Philippe Mathieu-Daudé
2021-01-24 17:47   ` Philippe Mathieu-Daudé
2021-01-23 10:40 ` [PATCH v2 09/25] hw/sd: ssi-sd: Fix the wrong command index for STOP_TRANSMISSION Bin Meng
2021-01-24 17:33   ` Philippe Mathieu-Daudé
2021-01-24 17:35     ` Philippe Mathieu-Daudé
2021-01-25  0:33     ` Bin Meng
2021-01-25  0:42       ` Bin Meng
2021-01-23 10:40 ` [PATCH v2 10/25] hw/sd: ssi-sd: Support multiple block read Bin Meng
2021-01-23 10:40 ` [PATCH v2 11/25] hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer Bin Meng
2021-01-24 17:36   ` Philippe Mathieu-Daudé
2021-01-23 10:40 ` [PATCH v2 12/25] hw/sd: sd: Remove duplicated codes in single/multiple block read/write Bin Meng
2021-01-23 10:40 ` [PATCH v2 13/25] hw/sd: sd: Allow single/multiple block write for SPI mode Bin Meng
2021-01-23 10:40 ` [PATCH v2 14/25] hw/sd: sd.h: Cosmetic change of using spaces Bin Meng
2021-01-24 17:43   ` Philippe Mathieu-Daudé
2021-01-23 10:40 ` [PATCH v2 15/25] hw/sd: Introduce receive_ready() callback Bin Meng
2021-01-23 10:40 ` [PATCH v2 16/25] hw/sd: ssi-sd: Support single block write Bin Meng
2021-01-23 10:40 ` [PATCH v2 17/25] hw/sd: ssi-sd: Support multiple " Bin Meng
2021-01-23 10:40 ` [PATCH v2 18/25] hw/sd: ssi-sd: Bump up version ids of VMStateDescription Bin Meng
2021-01-24 16:59   ` Philippe Mathieu-Daudé
2021-01-24 17:07     ` Philippe Mathieu-Daudé
2021-01-25  1:20     ` Bin Meng
2021-01-25 10:41       ` Dr. David Alan Gilbert
2021-01-25 10:48         ` Bin Meng
2021-01-23 10:40 ` [PATCH v2 19/25] hw/ssi: Add SiFive SPI controller support Bin Meng
2021-01-23 10:40 ` [PATCH v2 20/25] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash Bin Meng
2021-01-23 10:40 ` [PATCH v2 21/25] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card Bin Meng
2021-01-23 10:40 ` [PATCH v2 22/25] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value Bin Meng
2021-01-23 10:40 ` [PATCH v2 23/25] docs/system: Sort targets in alphabetical order Bin Meng
2021-01-23 10:40 ` [PATCH v2 24/25] docs/system: Add RISC-V documentation Bin Meng
2021-01-23 10:40 ` [PATCH v2 25/25] docs/system: riscv: Add documentation for sifive_u machine Bin Meng
2021-01-24 20:07 ` [PATCH v2 00/25] hw/riscv: sifive_u: Add missing SPI support Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210123104016.17485-3-bmeng.cn@gmail.com \
    --to=bmeng.cn@gmail.com \
    --cc=alistair.francis@wdc.com \
    --cc=bin.meng@windriver.com \
    --cc=f4bug@amsat.org \
    --cc=qemu-block@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).