From: Bin Meng <bmeng.cn@gmail.com>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Alistair Francis" <alistair.francis@wdc.com>,
qemu-block@nongnu.org, qemu-riscv@nongnu.org,
qemu-devel@nongnu.org
Cc: Bin Meng <bin.meng@windriver.com>
Subject: [PATCH v2 07/25] hw/sd: ssi-sd: Suffix a data block with CRC16
Date: Sat, 23 Jan 2021 18:39:58 +0800 [thread overview]
Message-ID: <20210123104016.17485-8-bmeng.cn@gmail.com> (raw)
In-Reply-To: <20210123104016.17485-1-bmeng.cn@gmail.com>
From: Bin Meng <bin.meng@windriver.com>
Per the SD spec, a valid data block is suffixed with a 16-bit CRC
generated by the standard CCITT polynomial x16+x12+x5+1. This part
is currently missing in the ssi-sd state machine. Without it, all
data block transfer fails in guest software because the expected
CRC16 is missing on the data out line.
Fixes: 775616c3ae8c ("Partial SD card SPI mode support")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
---
(no changes since v1)
hw/sd/ssi-sd.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c
index 043e270066..8bccedfab2 100644
--- a/hw/sd/ssi-sd.c
+++ b/hw/sd/ssi-sd.c
@@ -17,6 +17,7 @@
#include "hw/qdev-properties.h"
#include "hw/sd/sd.h"
#include "qapi/error.h"
+#include "qemu/crc-ccitt.h"
#include "qemu/module.h"
#include "qom/object.h"
@@ -40,6 +41,7 @@ typedef enum {
SSI_SD_RESPONSE,
SSI_SD_DATA_START,
SSI_SD_DATA_READ,
+ SSI_SD_DATA_CRC16,
} ssi_sd_mode;
struct ssi_sd_state {
@@ -48,6 +50,7 @@ struct ssi_sd_state {
int cmd;
uint8_t cmdarg[4];
uint8_t response[5];
+ uint16_t crc16;
int32_t arglen;
int32_t response_pos;
int32_t stopping;
@@ -194,12 +197,24 @@ static uint32_t ssi_sd_transfer(SSIPeripheral *dev, uint32_t val)
case SSI_SD_DATA_START:
DPRINTF("Start read block\n");
s->mode = SSI_SD_DATA_READ;
+ s->response_pos = 0;
return 0xfe;
case SSI_SD_DATA_READ:
val = sdbus_read_byte(&s->sdbus);
+ s->crc16 = crc_ccitt_false(s->crc16, (uint8_t *)&val, 1);
if (!sdbus_data_ready(&s->sdbus)) {
DPRINTF("Data read end\n");
+ s->mode = SSI_SD_DATA_CRC16;
+ }
+ return val;
+ case SSI_SD_DATA_CRC16:
+ val = (s->crc16 & 0xff00) >> 8;
+ s->crc16 <<= 8;
+ s->response_pos++;
+ if (s->response_pos == 2) {
+ DPRINTF("CRC16 read end\n");
s->mode = SSI_SD_CMD;
+ s->response_pos = 0;
}
return val;
}
@@ -237,6 +252,7 @@ static const VMStateDescription vmstate_ssi_sd = {
VMSTATE_INT32(cmd, ssi_sd_state),
VMSTATE_UINT8_ARRAY(cmdarg, ssi_sd_state, 4),
VMSTATE_UINT8_ARRAY(response, ssi_sd_state, 5),
+ VMSTATE_UINT16(crc16, ssi_sd_state),
VMSTATE_INT32(arglen, ssi_sd_state),
VMSTATE_INT32(response_pos, ssi_sd_state),
VMSTATE_INT32(stopping, ssi_sd_state),
@@ -288,6 +304,7 @@ static void ssi_sd_reset(DeviceState *dev)
s->cmd = 0;
memset(s->cmdarg, 0, sizeof(s->cmdarg));
memset(s->response, 0, sizeof(s->response));
+ s->crc16 = 0;
s->arglen = 0;
s->response_pos = 0;
s->stopping = 0;
--
2.25.1
next prev parent reply other threads:[~2021-01-23 10:47 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-23 10:39 [PATCH v2 00/25] hw/riscv: sifive_u: Add missing SPI support Bin Meng
2021-01-23 10:39 ` [PATCH v2 01/25] hw/block: m25p80: Add ISSI SPI flash support Bin Meng
2021-01-23 10:39 ` [PATCH v2 02/25] hw/block: m25p80: Add various ISSI flash information Bin Meng
2021-01-23 10:39 ` [PATCH v2 03/25] hw/sd: ssi-sd: Fix incorrect card response sequence Bin Meng
2021-01-24 17:48 ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 04/25] hw/sd: sd: Support CMD59 for SPI mode Bin Meng
2021-01-24 17:21 ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 05/25] hw/sd: sd: Drop sd_crc16() Bin Meng
2021-01-24 18:14 ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 06/25] util: Add CRC16 (CCITT) calculation routines Bin Meng
2021-01-24 18:59 ` Philippe Mathieu-Daudé
2021-01-24 20:07 ` Richard Henderson
2021-01-24 20:24 ` Philippe Mathieu-Daudé
2021-01-24 21:41 ` Richard Henderson
2021-01-26 7:44 ` Philippe Mathieu-Daudé
2021-01-23 10:39 ` Bin Meng [this message]
2021-01-24 18:57 ` [PATCH v2 07/25] hw/sd: ssi-sd: Suffix a data block with CRC16 Philippe Mathieu-Daudé
2021-01-23 10:39 ` [PATCH v2 08/25] hw/sd: ssi-sd: Add a state representing Nac Bin Meng
2021-01-24 17:26 ` Philippe Mathieu-Daudé
2021-01-24 17:47 ` Philippe Mathieu-Daudé
2021-01-23 10:40 ` [PATCH v2 09/25] hw/sd: ssi-sd: Fix the wrong command index for STOP_TRANSMISSION Bin Meng
2021-01-24 17:33 ` Philippe Mathieu-Daudé
2021-01-24 17:35 ` Philippe Mathieu-Daudé
2021-01-25 0:33 ` Bin Meng
2021-01-25 0:42 ` Bin Meng
2021-01-23 10:40 ` [PATCH v2 10/25] hw/sd: ssi-sd: Support multiple block read Bin Meng
2021-01-23 10:40 ` [PATCH v2 11/25] hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer Bin Meng
2021-01-24 17:36 ` Philippe Mathieu-Daudé
2021-01-23 10:40 ` [PATCH v2 12/25] hw/sd: sd: Remove duplicated codes in single/multiple block read/write Bin Meng
2021-01-23 10:40 ` [PATCH v2 13/25] hw/sd: sd: Allow single/multiple block write for SPI mode Bin Meng
2021-01-23 10:40 ` [PATCH v2 14/25] hw/sd: sd.h: Cosmetic change of using spaces Bin Meng
2021-01-24 17:43 ` Philippe Mathieu-Daudé
2021-01-23 10:40 ` [PATCH v2 15/25] hw/sd: Introduce receive_ready() callback Bin Meng
2021-01-23 10:40 ` [PATCH v2 16/25] hw/sd: ssi-sd: Support single block write Bin Meng
2021-01-23 10:40 ` [PATCH v2 17/25] hw/sd: ssi-sd: Support multiple " Bin Meng
2021-01-23 10:40 ` [PATCH v2 18/25] hw/sd: ssi-sd: Bump up version ids of VMStateDescription Bin Meng
2021-01-24 16:59 ` Philippe Mathieu-Daudé
2021-01-24 17:07 ` Philippe Mathieu-Daudé
2021-01-25 1:20 ` Bin Meng
2021-01-25 10:41 ` Dr. David Alan Gilbert
2021-01-25 10:48 ` Bin Meng
2021-01-23 10:40 ` [PATCH v2 19/25] hw/ssi: Add SiFive SPI controller support Bin Meng
2021-01-23 10:40 ` [PATCH v2 20/25] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash Bin Meng
2021-01-23 10:40 ` [PATCH v2 21/25] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card Bin Meng
2021-01-23 10:40 ` [PATCH v2 22/25] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value Bin Meng
2021-01-23 10:40 ` [PATCH v2 23/25] docs/system: Sort targets in alphabetical order Bin Meng
2021-01-23 10:40 ` [PATCH v2 24/25] docs/system: Add RISC-V documentation Bin Meng
2021-01-23 10:40 ` [PATCH v2 25/25] docs/system: riscv: Add documentation for sifive_u machine Bin Meng
2021-01-24 20:07 ` [PATCH v2 00/25] hw/riscv: sifive_u: Add missing SPI support Philippe Mathieu-Daudé
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