From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: Murilo Opsfelder Araujo <muriloo@linux.ibm.com>,
qemu-ppc@nongnu.org, Greg Kurz <groug@kaod.org>,
qemu-devel@nongnu.org
Subject: Re: [PATCH 3/7] ppc/pnv: Use skiboot addresses to load kernel and ramfs
Date: Thu, 28 Jan 2021 11:46:55 +1100 [thread overview]
Message-ID: <20210128004655.GF18347@yekko.fritz.box> (raw)
In-Reply-To: <20210126171059.307867-4-clg@kaod.org>
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On Tue, Jan 26, 2021 at 06:10:55PM +0100, Cédric Le Goater wrote:
> The current settings are useful to load large kernels (with debug) but
> it moves the initrd image in a memory region not protected by
> skiboot. If skiboot is compiled with DEBUG=1, memory poisoning will
> corrupt the initrd.
>
> Cc: Murilo Opsfelder Araujo <muriloo@linux.ibm.com>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Applied to ppc-for-6.0, thanks.
> ---
>
> If we want to increase the kernel size limit as commit b45b56baeecd
> ("ppc/pnv: increase kernel size limit to 256MiB") intented to do, I
> think we should add a machine option.
>
> hw/ppc/pnv.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 14fc9758a973..e500c2e2437e 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -65,9 +65,9 @@
> #define FW_MAX_SIZE (16 * MiB)
>
> #define KERNEL_LOAD_ADDR 0x20000000
> -#define KERNEL_MAX_SIZE (256 * MiB)
> -#define INITRD_LOAD_ADDR 0x60000000
> -#define INITRD_MAX_SIZE (256 * MiB)
> +#define KERNEL_MAX_SIZE (128 * MiB)
> +#define INITRD_LOAD_ADDR 0x28000000
> +#define INITRD_MAX_SIZE (128 * MiB)
>
> static const char *pnv_chip_core_typename(const PnvChip *o)
> {
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2021-01-28 1:49 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-26 17:10 [PATCH 0/7] ppc/pnv: Misc cleanups Cédric Le Goater
2021-01-26 17:10 ` [PATCH 1/7] ppc/pnv: Add trace events for PCI event notification Cédric Le Goater
2021-01-28 0:44 ` David Gibson
2021-01-26 17:10 ` [PATCH 2/7] ppc/xive: Add firmware bit when dumping the ENDs Cédric Le Goater
2021-01-28 0:45 ` David Gibson
2021-01-26 17:10 ` [PATCH 3/7] ppc/pnv: Use skiboot addresses to load kernel and ramfs Cédric Le Goater
2021-01-27 1:27 ` Murilo Opsfelder Araújo
2021-01-27 7:10 ` Cédric Le Goater
2021-01-27 11:57 ` Murilo Opsfelder Araújo
2021-01-28 0:45 ` Joel Stanley
2021-01-28 7:02 ` Cédric Le Goater
2021-01-28 22:36 ` David Gibson
2021-01-29 9:19 ` Cédric Le Goater
2021-01-28 0:46 ` David Gibson [this message]
2021-01-26 17:10 ` [PATCH 4/7] ppc/pnv: Simplify pnv_bmc_create() Cédric Le Goater
2021-01-28 0:46 ` Joel Stanley
2021-01-28 7:46 ` Cédric Le Goater
2021-01-28 12:04 ` Greg Kurz
2021-01-28 22:41 ` David Gibson
2021-01-28 22:40 ` David Gibson
2021-01-29 8:39 ` Cédric Le Goater
2021-01-31 23:14 ` Andrew Jeffery
2021-01-28 0:49 ` David Gibson
2021-01-26 17:10 ` [PATCH 5/7] ppc/pnv: Discard internal BMC initialization when BMC is external Cédric Le Goater
2021-01-28 0:48 ` Joel Stanley
2021-01-28 7:13 ` Cédric Le Goater
2021-01-28 10:08 ` Joel Stanley
2021-01-28 0:50 ` David Gibson
2021-01-26 17:10 ` [PATCH 6/7] ppc/pnv: Remove default disablement of the PNOR contents Cédric Le Goater
2021-01-28 0:52 ` Joel Stanley
2021-01-28 0:52 ` David Gibson
2021-01-26 17:10 ` [PATCH 7/7] ppc/pnv: Introduce a LPC FW memory region attribute to map the PNOR Cédric Le Goater
2021-01-28 0:53 ` Joel Stanley
2021-01-28 0:54 ` David Gibson
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