From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [PATCH v4 15/23] linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG
Date: Thu, 28 Jan 2021 12:41:33 -1000 [thread overview]
Message-ID: <20210128224141.638790-16-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210128224141.638790-1-richard.henderson@linaro.org>
These prctl fields are required for the function of MTE.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
linux-user/aarch64/target_syscall.h | 9 ++++++
linux-user/syscall.c | 43 +++++++++++++++++++++++++++++
2 files changed, 52 insertions(+)
diff --git a/linux-user/aarch64/target_syscall.h b/linux-user/aarch64/target_syscall.h
index 820601dfcc..76f6c3391d 100644
--- a/linux-user/aarch64/target_syscall.h
+++ b/linux-user/aarch64/target_syscall.h
@@ -33,5 +33,14 @@ struct target_pt_regs {
#define TARGET_PR_SET_TAGGED_ADDR_CTRL 55
#define TARGET_PR_GET_TAGGED_ADDR_CTRL 56
# define TARGET_PR_TAGGED_ADDR_ENABLE (1UL << 0)
+/* MTE tag check fault modes */
+# define TARGET_PR_MTE_TCF_SHIFT 1
+# define TARGET_PR_MTE_TCF_NONE (0UL << TARGET_PR_MTE_TCF_SHIFT)
+# define TARGET_PR_MTE_TCF_SYNC (1UL << TARGET_PR_MTE_TCF_SHIFT)
+# define TARGET_PR_MTE_TCF_ASYNC (2UL << TARGET_PR_MTE_TCF_SHIFT)
+# define TARGET_PR_MTE_TCF_MASK (3UL << TARGET_PR_MTE_TCF_SHIFT)
+/* MTE tag inclusion mask */
+# define TARGET_PR_MTE_TAG_SHIFT 3
+# define TARGET_PR_MTE_TAG_MASK (0xffffUL << TARGET_PR_MTE_TAG_SHIFT)
#endif /* AARCH64_TARGET_SYSCALL_H */
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 46526f50b0..d645eb8f44 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -10967,17 +10967,53 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1,
{
abi_ulong valid_mask = TARGET_PR_TAGGED_ADDR_ENABLE;
CPUARMState *env = cpu_env;
+ ARMCPU *cpu = env_archcpu(env);
+
+ if (cpu_isar_feature(aa64_mte, cpu)) {
+ valid_mask |= TARGET_PR_MTE_TCF_MASK;
+ valid_mask |= TARGET_PR_MTE_TAG_MASK;
+ }
if ((arg2 & ~valid_mask) || arg3 || arg4 || arg5) {
return -TARGET_EINVAL;
}
env->tagged_addr_enable = arg2 & TARGET_PR_TAGGED_ADDR_ENABLE;
+
+ if (cpu_isar_feature(aa64_mte, cpu)) {
+ switch (arg2 & TARGET_PR_MTE_TCF_MASK) {
+ case TARGET_PR_MTE_TCF_NONE:
+ case TARGET_PR_MTE_TCF_SYNC:
+ case TARGET_PR_MTE_TCF_ASYNC:
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /*
+ * Write PR_MTE_TCF to SCTLR_EL1[TCF0].
+ * Note that the syscall values are consistent with hw.
+ */
+ env->cp15.sctlr_el[1] =
+ deposit64(env->cp15.sctlr_el[1], 38, 2,
+ arg2 >> TARGET_PR_MTE_TCF_SHIFT);
+
+ /*
+ * Write PR_MTE_TAG to GCR_EL1[Exclude].
+ * Note that the syscall uses an include mask,
+ * and hardware uses an exclude mask -- invert.
+ */
+ env->cp15.gcr_el1 =
+ deposit64(env->cp15.gcr_el1, 0, 16,
+ ~arg2 >> TARGET_PR_MTE_TAG_SHIFT);
+ arm_rebuild_hflags(env);
+ }
return 0;
}
case TARGET_PR_GET_TAGGED_ADDR_CTRL:
{
abi_long ret = 0;
CPUARMState *env = cpu_env;
+ ARMCPU *cpu = env_archcpu(env);
if (arg2 || arg3 || arg4 || arg5) {
return -TARGET_EINVAL;
@@ -10985,6 +11021,13 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1,
if (env->tagged_addr_enable) {
ret |= TARGET_PR_TAGGED_ADDR_ENABLE;
}
+ if (cpu_isar_feature(aa64_mte, cpu)) {
+ /* See above. */
+ ret |= (extract64(env->cp15.sctlr_el[1], 38, 2)
+ << TARGET_PR_MTE_TCF_SHIFT);
+ ret = deposit64(ret, TARGET_PR_MTE_TAG_SHIFT, 16,
+ ~env->cp15.gcr_el1);
+ }
return ret;
}
#endif /* AARCH64 */
--
2.25.1
next prev parent reply other threads:[~2021-01-28 22:54 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-28 22:41 [PATCH v4 00/23] target-arm: Implement ARMv8.5-MemTag, user mode Richard Henderson
2021-01-28 22:41 ` [PATCH v4 01/23] tcg: Introduce target-specific page data for user-only Richard Henderson
2021-02-02 14:29 ` Peter Maydell
2021-02-03 2:40 ` Richard Henderson
2021-02-03 5:49 ` Richard Henderson
2021-02-03 15:33 ` Alex Bennée
2021-01-28 22:41 ` [PATCH v4 02/23] linux-user: Introduce PAGE_ANON Richard Henderson
2021-01-28 22:41 ` [PATCH v4 03/23] exec: Use uintptr_t for guest_base Richard Henderson
2021-02-02 14:31 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 04/23] exec: Use uintptr_t in cpu_ldst.h Richard Henderson
2021-02-02 14:32 ` Peter Maydell
2021-02-02 15:30 ` Philippe Mathieu-Daudé
2021-01-28 22:41 ` [PATCH v4 05/23] exec: Improve types for guest_addr_valid Richard Henderson
2021-02-02 14:33 ` Peter Maydell
2021-02-02 15:31 ` Philippe Mathieu-Daudé
2021-01-28 22:41 ` [PATCH v4 06/23] linux-user: Check for overflow in access_ok Richard Henderson
2021-01-28 22:41 ` [PATCH v4 07/23] linux-user: Tidy VERIFY_READ/VERIFY_WRITE Richard Henderson
2021-01-28 22:41 ` [PATCH v4 08/23] bsd-user: " Richard Henderson
2021-01-28 22:41 ` [PATCH v4 09/23] linux-user: Do not use guest_addr_valid for h2g_valid Richard Henderson
2021-02-02 14:34 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 10/23] linux-user: Fix guest_addr_valid vs reserved_va Richard Henderson
2021-02-02 14:35 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 11/23] exec: Add support for TARGET_TAGGED_ADDRESSES Richard Henderson
2021-02-02 15:05 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 12/23] linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE Richard Henderson
2021-02-02 14:37 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 13/23] target/arm: Improve gen_top_byte_ignore Richard Henderson
2021-02-02 14:40 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 14/23] target/arm: Use the proper TBI settings for linux-user Richard Henderson
2021-02-02 14:41 ` Peter Maydell
2021-01-28 22:41 ` Richard Henderson [this message]
2021-02-02 14:43 ` [PATCH v4 15/23] linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG Peter Maydell
2021-01-28 22:41 ` [PATCH v4 16/23] linux-user/aarch64: Implement PROT_MTE Richard Henderson
2021-01-28 22:41 ` [PATCH v4 17/23] target/arm: Split out syndrome.h from internals.h Richard Henderson
2021-02-02 14:44 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 18/23] linux-user/aarch64: Pass syndrome to EXC_*_ABORT Richard Henderson
2021-02-02 14:44 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 19/23] linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault Richard Henderson
2021-02-02 14:45 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 20/23] linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error Richard Henderson
2021-02-02 14:46 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 21/23] target/arm: Add allocation tag storage for user mode Richard Henderson
2021-02-02 14:46 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 22/23] target/arm: Enable MTE for user-only Richard Henderson
2021-02-02 14:47 ` Peter Maydell
2021-01-28 22:41 ` [PATCH v4 23/23] tests/tcg/aarch64: Add mte smoke tests Richard Henderson
2021-02-02 14:49 ` Peter Maydell
2021-01-28 23:15 ` [PATCH v4 00/23] target-arm: Implement ARMv8.5-MemTag, user mode no-reply
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