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[98.223.182.45]) by smtp.gmail.com with ESMTPSA id n193sm5662253iod.21.2021.01.30.10.42.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Jan 2021 10:42:33 -0800 (PST) From: Iris Johnson To: Subject: [PATCH] hw/char/exynos4210_uart: Fix missing call to report ready for input Date: Sat, 30 Jan 2021 18:40:17 +0000 Message-Id: <20210130184016.1787097-1-iris@modwiz.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: none client-ip=2607:f8b0:4864:20::d32; envelope-from=iris@modwiz.com; helo=mail-io1-xd32.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Iris Johnson , Igor Mitsyanko , "open list:All patches CC here" , "open list:Exynos" , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" When the frontend device has no space for a read the fd is removed from polling to allow time for the guest to read and clear the buffer. Without the call to qemu_chr_fe_accept_input(), the poll will not be broken out of when the guest has cleared the buffer causing significant IO delays that get worse with smaller buffers. Buglink: https://bugs.launchpad.net/qemu/+bug/1913341 Signed-off-by: Iris Johnson --- hw/char/exynos4210_uart.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c index 6361df2ad3..51ba862d0b 100644 --- a/hw/char/exynos4210_uart.c +++ b/hw/char/exynos4210_uart.c @@ -519,6 +519,7 @@ static uint64_t exynos4210_uart_read(void *opaque, hwaddr offset, s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; res = s->reg[I_(URXH)]; } + qemu_chr_fe_accept_input(&s->chr); exynos4210_uart_update_dmabusy(s); trace_exynos_uart_read(s->channel, offset, exynos4210_uart_regname(offset), res); -- 2.25.1