From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: sw@weilnetz.de
Subject: [PATCH v2 84/93] tcg/tci: Emit setcond before brcond
Date: Wed, 3 Feb 2021 15:56:07 -1000 [thread overview]
Message-ID: <20210204015607.885503-1-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210204014509.882821-1-richard.henderson@linaro.org>
The encoding planned for tci does not have enough room for
brcond2, with 4 registers and a condition as input as well
as the label. Resolve the condition into TCG_REG_TMP, and
relax brcond to one register plus a label, considering the
condition to always be reg != 0.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tci.c | 68 ++++++++++------------------------------
tcg/tci/tcg-target.c.inc | 52 +++++++++++-------------------
2 files changed, 35 insertions(+), 85 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index d27db9f720..e7268b13e1 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -141,6 +141,16 @@ static void tci_args_nl(const uint8_t **tb_ptr, uint8_t *n0, void **l1)
check_size(start, tb_ptr);
}
+static void tci_args_rl(const uint8_t **tb_ptr, TCGReg *r0, void **l1)
+{
+ const uint8_t *start = *tb_ptr;
+
+ *r0 = tci_read_r(tb_ptr);
+ *l1 = (void *)tci_read_label(tb_ptr);
+
+ check_size(start, tb_ptr);
+}
+
static void tci_args_rr(const uint8_t **tb_ptr,
TCGReg *r0, TCGReg *r1)
{
@@ -212,19 +222,6 @@ static void tci_args_rrs(const uint8_t **tb_ptr,
check_size(start, tb_ptr);
}
-static void tci_args_rrcl(const uint8_t **tb_ptr,
- TCGReg *r0, TCGReg *r1, TCGCond *c2, void **l3)
-{
- const uint8_t *start = *tb_ptr;
-
- *r0 = tci_read_r(tb_ptr);
- *r1 = tci_read_r(tb_ptr);
- *c2 = tci_read_b(tb_ptr);
- *l3 = (void *)tci_read_label(tb_ptr);
-
- check_size(start, tb_ptr);
-}
-
static void tci_args_rrrc(const uint8_t **tb_ptr,
TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3)
{
@@ -293,21 +290,6 @@ static void tci_args_rrrr(const uint8_t **tb_ptr,
check_size(start, tb_ptr);
}
-static void tci_args_rrrrcl(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1,
- TCGReg *r2, TCGReg *r3, TCGCond *c4, void **l5)
-{
- const uint8_t *start = *tb_ptr;
-
- *r0 = tci_read_r(tb_ptr);
- *r1 = tci_read_r(tb_ptr);
- *r2 = tci_read_r(tb_ptr);
- *r3 = tci_read_r(tb_ptr);
- *c4 = tci_read_b(tb_ptr);
- *l5 = (void *)tci_read_label(tb_ptr);
-
- check_size(start, tb_ptr);
-}
-
static void tci_args_rrrrrc(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1,
TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGCond *c5)
{
@@ -723,8 +705,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
break;
#endif
case INDEX_op_brcond_i32:
- tci_args_rrcl(&tb_ptr, &r0, &r1, &condition, &ptr);
- if (tci_compare32(regs[r0], regs[r1], condition)) {
+ tci_args_rl(&tb_ptr, &r0, &ptr);
+ if ((uint32_t)regs[r0]) {
tb_ptr = ptr;
}
break;
@@ -741,15 +723,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
T2 = tci_uint64(regs[r5], regs[r4]);
tci_write_reg64(regs, r1, r0, T1 - T2);
break;
- case INDEX_op_brcond2_i32:
- tci_args_rrrrcl(&tb_ptr, &r0, &r1, &r2, &r3, &condition, &ptr);
- T1 = tci_uint64(regs[r1], regs[r0]);
- T2 = tci_uint64(regs[r3], regs[r2]);
- if (tci_compare64(T1, T2, condition)) {
- tb_ptr = ptr;
- continue;
- }
- break;
case INDEX_op_mulu2_i32:
tci_args_rrrr(&tb_ptr, &r0, &r1, &r2, &r3);
tci_write_reg64(regs, r1, r0, (uint64_t)regs[r2] * regs[r3]);
@@ -877,8 +850,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
break;
#endif
case INDEX_op_brcond_i64:
- tci_args_rrcl(&tb_ptr, &r0, &r1, &condition, &ptr);
- if (tci_compare64(regs[r0], regs[r1], condition)) {
+ tci_args_rl(&tb_ptr, &r0, &ptr);
+ if (regs[r0]) {
tb_ptr = ptr;
}
break;
@@ -1188,9 +1161,9 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info)
case INDEX_op_brcond_i32:
case INDEX_op_brcond_i64:
- tci_args_rrcl(&tb_ptr, &r0, &r1, &c, &ptr);
- info->fprintf_func(info->stream, "%-12s %s,%s,%s,%p",
- op_name, str_r(r0), str_r(r1), str_c(c), ptr);
+ tci_args_rl(&tb_ptr, &r0, &ptr);
+ info->fprintf_func(info->stream, "%-12s %s,0,ne,%p",
+ op_name, str_r(r0), ptr);
break;
case INDEX_op_setcond_i32:
@@ -1315,13 +1288,6 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info)
str_r(r3), str_r(r4), str_c(c));
break;
- case INDEX_op_brcond2_i32:
- tci_args_rrrrcl(&tb_ptr, &r0, &r1, &r2, &r3, &c, &ptr);
- info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%s,%p",
- op_name, str_r(r0), str_r(r1),
- str_r(r2), str_r(r3), str_c(c), ptr);
- break;
-
case INDEX_op_mulu2_i32:
tci_args_rrrr(&tb_ptr, &r0, &r1, &r2, &r3);
info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s",
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index b29e75425d..e06d4e9380 100644
--- a/tcg/tci/tcg-target.c.inc
+++ b/tcg/tci/tcg-target.c.inc
@@ -349,6 +349,17 @@ static void tcg_out_op_rI(TCGContext *s, TCGOpcode op,
}
#endif
+static void tcg_out_op_rl(TCGContext *s, TCGOpcode op, TCGReg r0, TCGLabel *l1)
+{
+ uint8_t *old_code_ptr = s->code_ptr;
+
+ tcg_out_op_t(s, op);
+ tcg_out_r(s, r0);
+ tci_out_label(s, l1);
+
+ old_code_ptr[1] = s->code_ptr - old_code_ptr;
+}
+
static void tcg_out_op_rr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1)
{
uint8_t *old_code_ptr = s->code_ptr;
@@ -400,20 +411,6 @@ static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op,
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
-static void tcg_out_op_rrcl(TCGContext *s, TCGOpcode op,
- TCGReg r0, TCGReg r1, TCGCond c2, TCGLabel *l3)
-{
- uint8_t *old_code_ptr = s->code_ptr;
-
- tcg_out_op_t(s, op);
- tcg_out_r(s, r0);
- tcg_out_r(s, r1);
- tcg_out8(s, c2);
- tci_out_label(s, l3);
-
- old_code_ptr[1] = s->code_ptr - old_code_ptr;
-}
-
static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode op,
TCGReg r0, TCGReg r1, TCGReg r2, TCGCond c3)
{
@@ -487,23 +484,6 @@ static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode op,
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
-static void tcg_out_op_rrrrcl(TCGContext *s, TCGOpcode op,
- TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3,
- TCGCond c4, TCGLabel *l5)
-{
- uint8_t *old_code_ptr = s->code_ptr;
-
- tcg_out_op_t(s, op);
- tcg_out_r(s, r0);
- tcg_out_r(s, r1);
- tcg_out_r(s, r2);
- tcg_out_r(s, r3);
- tcg_out8(s, c4);
- tci_out_label(s, l5);
-
- old_code_ptr[1] = s->code_ptr - old_code_ptr;
-}
-
static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op,
TCGReg r0, TCGReg r1, TCGReg r2,
TCGReg r3, TCGReg r4, TCGCond c5)
@@ -704,7 +684,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
break;
CASE_32_64(brcond)
- tcg_out_op_rrcl(s, opc, args[0], args[1], args[2], arg_label(args[3]));
+ tcg_out_op_rrrc(s, (opc == INDEX_op_brcond_i32
+ ? INDEX_op_setcond_i32 : INDEX_op_setcond_i64),
+ TCG_REG_TMP, args[0], args[1], args[2]);
+ tcg_out_op_rl(s, opc, TCG_REG_TMP, arg_label(args[3]));
break;
CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */
@@ -730,8 +713,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
args[3], args[4], args[5]);
break;
case INDEX_op_brcond2_i32:
- tcg_out_op_rrrrcl(s, opc, args[0], args[1], args[2],
- args[3], args[4], arg_label(args[5]));
+ tcg_out_op_rrrrrc(s, INDEX_op_setcond2_i32, TCG_REG_TMP,
+ args[0], args[1], args[2], args[3], args[4]);
+ tcg_out_op_rl(s, INDEX_op_brcond_i32, TCG_REG_TMP, arg_label(args[5]));
break;
case INDEX_op_mulu2_i32:
tcg_out_op_rrrr(s, opc, args[0], args[1], args[2], args[3]);
--
2.25.1
next prev parent reply other threads:[~2021-02-04 2:51 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-04 1:43 [PATCH v2 00/93] TCI fixes and cleanups Richard Henderson
2021-02-04 1:43 ` [PATCH v2 01/93] gdbstub: Fix handle_query_xfer_auxv Richard Henderson
2021-02-04 1:43 ` [PATCH v2 02/93] tcg: Split out tcg_raise_tb_overflow Richard Henderson
2021-02-04 1:43 ` [PATCH v2 03/93] configure: Fix --enable-tcg-interpreter Richard Henderson
2021-02-04 1:43 ` [PATCH v2 04/93] tcg: Manage splitwx in tc_ptr_to_region_tree by hand Richard Henderson
2021-02-04 15:01 ` Alex Bennée
2021-02-04 17:46 ` Richard Henderson
2021-02-04 18:45 ` Alex Bennée
2021-02-04 19:17 ` Richard Henderson
2021-02-04 1:43 ` [PATCH v2 05/93] tcg/tci: Make tci_tb_ptr thread-local Richard Henderson
2021-02-04 15:05 ` Alex Bennée
2021-02-04 1:43 ` [PATCH v2 06/93] tcg/tci: Implement INDEX_op_ld16s_i32 Richard Henderson
2021-02-04 1:43 ` [PATCH v2 07/93] tcg/tci: Implement INDEX_op_ld8s_i64 Richard Henderson
2021-02-04 1:43 ` [PATCH v2 08/93] tcg/tci: Inline tci_write_reg32s into the only caller Richard Henderson
2021-02-04 1:43 ` [PATCH v2 09/93] tcg/tci: Inline tci_write_reg8 into its callers Richard Henderson
2021-02-04 1:43 ` [PATCH v2 10/93] tcg/tci: Inline tci_write_reg16 into the only caller Richard Henderson
2021-02-04 1:43 ` [PATCH v2 11/93] tcg/tci: Inline tci_write_reg32 into all callers Richard Henderson
2021-02-04 1:43 ` [PATCH v2 12/93] tcg/tci: Inline tci_write_reg64 into 64-bit callers Richard Henderson
2021-02-04 1:43 ` [PATCH v2 13/93] tcg/tci: Merge INDEX_op_ld8u_{i32,i64} Richard Henderson
2021-02-04 1:43 ` [PATCH v2 14/93] tcg/tci: Merge INDEX_op_ld8s_{i32,i64} Richard Henderson
2021-02-04 1:43 ` [PATCH v2 15/93] tcg/tci: Merge INDEX_op_ld16u_{i32,i64} Richard Henderson
2021-02-04 1:43 ` [PATCH v2 16/93] tcg/tci: Merge INDEX_op_ld16s_{i32,i64} Richard Henderson
2021-02-04 1:43 ` [PATCH v2 17/93] tcg/tci: Merge INDEX_op_{ld_i32,ld32u_i64} Richard Henderson
2021-02-04 1:43 ` [PATCH v2 18/93] tcg/tci: Merge INDEX_op_st8_{i32,i64} Richard Henderson
2021-02-04 1:43 ` [PATCH v2 19/93] tcg/tci: Merge INDEX_op_st16_{i32,i64} Richard Henderson
2021-02-04 1:43 ` [PATCH v2 20/93] tcg/tci: Move stack bounds check to compile-time Richard Henderson
2021-02-04 1:43 ` [PATCH v2 21/93] tcg/tci: Merge INDEX_op_{st_i32,st32_i64} Richard Henderson
2021-02-04 1:43 ` [PATCH v2 22/93] tcg/tci: Use g_assert_not_reached Richard Henderson
2021-02-04 1:43 ` [PATCH v2 23/93] tcg/tci: Remove dead code for TCG_TARGET_HAS_div2_* Richard Henderson
2021-02-04 1:44 ` [PATCH v2 24/93] tcg/tci: Implement 64-bit division Richard Henderson
2021-02-04 1:44 ` [PATCH v2 25/93] tcg/tci: Remove TODO as unused Richard Henderson
2021-02-04 1:44 ` [PATCH v2 26/93] tcg/tci: Restrict TCG_TARGET_NB_REGS to 16 Richard Henderson
2021-02-04 15:07 ` Alex Bennée
2021-02-04 1:44 ` [PATCH v2 27/93] tcg/tci: Fix TCG_REG_R4 misusage Richard Henderson
2021-02-04 15:09 ` Alex Bennée
2021-02-04 1:44 ` [PATCH v2 28/93] tcg/tci: Use bool in tcg_out_ri* Richard Henderson
2021-02-04 15:11 ` Alex Bennée
2021-02-04 15:15 ` Alex Bennée
2021-02-04 1:44 ` [PATCH v2 29/93] tcg/tci: Remove TCG_CONST Richard Henderson
2021-02-04 15:39 ` Alex Bennée
2021-02-04 17:52 ` Richard Henderson
2021-02-04 18:48 ` Alex Bennée
2021-02-04 1:44 ` [PATCH v2 30/93] tcg/tci: Merge identical cases in generation Richard Henderson
2021-02-04 1:44 ` [PATCH v2 31/93] tcg/tci: Remove tci_read_r8 Richard Henderson
2021-02-04 1:44 ` [PATCH v2 32/93] tcg/tci: Remove tci_read_r8s Richard Henderson
2021-02-04 1:44 ` [PATCH v2 33/93] tcg/tci: Remove tci_read_r16 Richard Henderson
2021-02-04 1:44 ` [PATCH v2 34/93] tcg/tci: Remove tci_read_r16s Richard Henderson
2021-02-04 1:44 ` [PATCH v2 35/93] tcg/tci: Remove tci_read_r32s Richard Henderson
2021-02-04 1:44 ` [PATCH v2 36/93] tcg/tci: Reduce use of tci_read_r64 Richard Henderson
2021-02-04 1:44 ` [PATCH v2 37/93] tcg/tci: Merge basic arithmetic operations Richard Henderson
2021-02-04 1:44 ` [PATCH v2 38/93] tcg/tci: Merge extension operations Richard Henderson
2021-02-04 1:44 ` [PATCH v2 39/93] tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us]_i64 Richard Henderson
2021-02-04 1:44 ` [PATCH v2 40/93] tcg/tci: Merge bswap operations Richard Henderson
2021-02-04 1:44 ` [PATCH v2 41/93] tcg/tci: Merge mov, not and neg operations Richard Henderson
2021-02-04 1:44 ` [PATCH v2 42/93] tcg/tci: Rename tci_read_r to tci_read_rval Richard Henderson
2021-02-04 1:44 ` [PATCH v2 43/93] tcg/tci: Split out tci_args_rrs Richard Henderson
2021-02-04 1:44 ` [PATCH v2 44/93] tcg/tci: Split out tci_args_rr Richard Henderson
2021-02-04 1:44 ` [PATCH v2 45/93] tcg/tci: Split out tci_args_rrr Richard Henderson
2021-02-04 1:44 ` [PATCH v2 46/93] tcg/tci: Split out tci_args_rrrc Richard Henderson
2021-02-04 1:44 ` [PATCH v2 47/93] tcg/tci: Split out tci_args_l Richard Henderson
2021-02-04 1:44 ` [PATCH v2 48/93] tcg/tci: Split out tci_args_rrrrrc Richard Henderson
2021-02-04 1:44 ` [PATCH v2 49/93] tcg/tci: Split out tci_args_rrcl and tci_args_rrrrcl Richard Henderson
2021-02-04 1:44 ` [PATCH v2 50/93] tcg/tci: Split out tci_args_ri and tci_args_rI Richard Henderson
2021-02-04 1:44 ` [PATCH v2 51/93] tcg/tci: Reuse tci_args_l for calls Richard Henderson
2021-02-04 1:44 ` [PATCH v2 52/93] tcg/tci: Reuse tci_args_l for exit_tb Richard Henderson
2021-02-04 1:44 ` [PATCH v2 53/93] tcg/tci: Reuse tci_args_l for goto_tb Richard Henderson
2021-02-04 1:44 ` [PATCH v2 54/93] tcg/tci: Split out tci_args_rrrrrr Richard Henderson
2021-02-04 1:44 ` [PATCH v2 55/93] tcg/tci: Split out tci_args_rrrr Richard Henderson
2021-02-04 1:44 ` [PATCH v2 56/93] tcg/tci: Clean up deposit operations Richard Henderson
2021-02-04 1:44 ` [PATCH v2 57/93] tcg/tci: Reduce qemu_ld/st TCGMemOpIdx operand to 32-bits Richard Henderson
2021-02-04 1:44 ` [PATCH v2 58/93] tcg/tci: Split out tci_args_{rrm,rrrm,rrrrm} Richard Henderson
2021-02-04 1:44 ` [PATCH v2 59/93] tcg/tci: Hoist op_size checking into tci_args_* Richard Henderson
2021-02-04 1:44 ` [PATCH v2 60/93] tcg/tci: Remove tci_disas Richard Henderson
2021-02-04 1:44 ` [PATCH v2 61/93] tcg/tci: Implement the disassembler properly Richard Henderson
2021-02-04 1:44 ` [PATCH v2 62/93] tcg: Build ffi data structures for helpers Richard Henderson
2021-02-04 1:44 ` [PATCH v2 63/93] tcg/tci: Use ffi for calls Richard Henderson
2021-02-07 16:25 ` Stefan Weil
2021-02-07 17:39 ` Richard Henderson
2021-02-07 19:52 ` Peter Maydell
2021-02-07 20:12 ` Richard Henderson
2021-02-07 21:33 ` Stefan Weil
2021-02-08 9:20 ` Peter Maydell
2021-02-08 9:35 ` Paolo Bonzini
2021-02-08 13:07 ` Stefan Weil
2021-02-08 17:39 ` Richard Henderson
2021-02-08 19:04 ` Stefan Weil
2021-02-08 22:55 ` Richard Henderson
2021-02-09 20:46 ` Richard Henderson
2021-02-09 21:15 ` Stefan Weil
2021-02-09 21:54 ` Stefan Weil
2021-02-04 1:44 ` [PATCH v2 64/93] tcg/tci: Improve tcg_target_call_clobber_regs Richard Henderson
2021-02-04 1:44 ` [PATCH v2 65/93] tcg/tci: Move call-return regs to end of tcg_target_reg_alloc_order Richard Henderson
2021-02-04 1:44 ` [PATCH v2 66/93] tcg/tci: Push opcode emit into each case Richard Henderson
2021-02-04 1:44 ` [PATCH v2 67/93] tcg/tci: Split out tcg_out_op_rrs Richard Henderson
2021-02-04 1:44 ` [PATCH v2 68/93] tcg/tci: Split out tcg_out_op_l Richard Henderson
2021-02-04 1:44 ` [PATCH v2 69/93] tcg/tci: Split out tcg_out_op_p Richard Henderson
2021-02-04 1:44 ` [PATCH v2 70/93] tcg/tci: Split out tcg_out_op_rr Richard Henderson
2021-02-04 1:44 ` [PATCH v2 71/93] tcg/tci: Split out tcg_out_op_rrr Richard Henderson
2021-02-04 1:44 ` [PATCH v2 72/93] tcg/tci: Split out tcg_out_op_rrrc Richard Henderson
2021-02-04 1:44 ` [PATCH v2 73/93] tcg/tci: Split out tcg_out_op_rrrrrc Richard Henderson
2021-02-04 1:44 ` [PATCH v2 74/93] tcg/tci: Split out tcg_out_op_rrrbb Richard Henderson
2021-02-04 1:44 ` [PATCH v2 75/93] tcg/tci: Split out tcg_out_op_rrcl Richard Henderson
2021-02-04 1:44 ` [PATCH v2 76/93] tcg/tci: Split out tcg_out_op_rrrrrr Richard Henderson
2021-02-04 1:44 ` [PATCH v2 77/93] tcg/tci: Split out tcg_out_op_rrrr Richard Henderson
2021-02-04 1:44 ` [PATCH v2 78/93] tcg/tci: Split out tcg_out_op_rrrrcl Richard Henderson
2021-02-04 1:44 ` [PATCH v2 79/93] tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm} Richard Henderson
2021-02-04 1:54 ` Richard Henderson
2021-02-04 14:54 ` Alex Bennée
2021-02-04 17:54 ` Richard Henderson
2021-02-04 1:54 ` [PATCH v2 80/93] tcg/tci: Split out tcg_out_op_v Richard Henderson
2021-02-04 1:55 ` [PATCH v2 81/93] tcg/tci: Split out tcg_out_op_np Richard Henderson
2021-02-04 1:55 ` [PATCH v2 82/93] tcg/tci: Split out tcg_out_op_r[iI] Richard Henderson
2021-02-04 1:55 ` [PATCH v2 83/93] tcg/tci: Reserve r13 for a temporary Richard Henderson
2021-02-04 1:56 ` Richard Henderson [this message]
2021-02-04 1:56 ` [PATCH v2 85/93] tcg/tci: Remove tci_write_reg Richard Henderson
2021-02-04 1:56 ` [PATCH v2 86/93] tcg/tci: Change encoding to uint32_t units Richard Henderson
2021-02-04 1:57 ` [PATCH v2 87/93] tcg/tci: Implement goto_ptr Richard Henderson
2021-02-04 1:57 ` [PATCH v2 88/93] tcg/tci: Implement movcond Richard Henderson
2021-02-04 1:57 ` [PATCH v2 89/93] tcg/tci: Implement andc, orc, eqv, nand, nor Richard Henderson
2021-02-04 1:57 ` [PATCH v2 90/93] tcg/tci: Implement extract, sextract Richard Henderson
2021-02-04 1:58 ` [PATCH v2 91/93] tcg/tci: Implement clz, ctz, ctpop Richard Henderson
2021-02-04 1:58 ` [PATCH v2 92/93] tcg/tci: Implement mulu2, muls2 Richard Henderson
2021-02-04 1:58 ` [PATCH v2 93/93] tcg/tci: Implement add2, sub2 Richard Henderson
2021-02-04 3:31 ` [PATCH v2 00/93] TCI fixes and cleanups no-reply
2021-02-04 9:58 ` Peter Maydell
2021-02-04 20:02 ` Stefan Weil
2021-02-04 20:42 ` Richard Henderson
2021-02-04 23:52 ` Richard Henderson
2021-02-05 2:39 ` Richard Henderson
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