* [PATCH v2 1/2] hw/ppc: e500: Use a macro for the platform clock frequency
@ 2021-02-03 14:24 Bin Meng
2021-02-03 14:24 ` [PATCH v2 2/2] hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes Bin Meng
2021-02-04 2:59 ` [PATCH v2 1/2] hw/ppc: e500: Use a macro for the platform clock frequency David Gibson
0 siblings, 2 replies; 6+ messages in thread
From: Bin Meng @ 2021-02-03 14:24 UTC (permalink / raw)
To: David Gibson, Greg Kurz
Cc: Bin Meng, qemu-ppc, qemu-devel, Philippe Mathieu-Daudé
From: Bin Meng <bin.meng@windriver.com>
At present the platform clock frequency is using a magic number.
Convert it to a macro and use it everywhere.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Changes in v2:
- Rename the macro per Philippe's comments
hw/ppc/e500.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index c64b5d0..c795276 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -74,6 +74,8 @@
#define MPC8544_I2C_IRQ 43
#define RTC_REGS_OFFSET 0x68
+#define PLATFORM_CLK_FREQ_HZ (400 * 1000 * 1000)
+
struct boot_info
{
uint32_t dt_base;
@@ -320,8 +322,8 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
int fdt_size;
void *fdt;
uint8_t hypercall[16];
- uint32_t clock_freq = 400000000;
- uint32_t tb_freq = 400000000;
+ uint32_t clock_freq = PLATFORM_CLK_FREQ_HZ;
+ uint32_t tb_freq = PLATFORM_CLK_FREQ_HZ;
int i;
char compatible_sb[] = "fsl,mpc8544-immr\0simple-bus";
char *soc;
@@ -890,7 +892,7 @@ void ppce500_init(MachineState *machine)
env->spr_cb[SPR_BOOKE_PIR].default_value = cs->cpu_index = i;
env->mpic_iack = pmc->ccsrbar_base + MPC8544_MPIC_REGS_OFFSET + 0xa0;
- ppc_booke_timers_init(cpu, 400000000, PPC_TIMER_E500);
+ ppc_booke_timers_init(cpu, PLATFORM_CLK_FREQ_HZ, PPC_TIMER_E500);
/* Register reset handler */
if (!i) {
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes
2021-02-03 14:24 [PATCH v2 1/2] hw/ppc: e500: Use a macro for the platform clock frequency Bin Meng
@ 2021-02-03 14:24 ` Bin Meng
2021-02-04 2:59 ` David Gibson
2021-02-04 2:59 ` [PATCH v2 1/2] hw/ppc: e500: Use a macro for the platform clock frequency David Gibson
1 sibling, 1 reply; 6+ messages in thread
From: Bin Meng @ 2021-02-03 14:24 UTC (permalink / raw)
To: David Gibson, Greg Kurz
Cc: Bin Meng, qemu-ppc, qemu-devel, Philippe Mathieu-Daudé
From: Bin Meng <bin.meng@windriver.com>
At present the <clock-frequency> property of the serial node is
populated with value zero. U-Boot's ns16550 driver is not happy
about this, so let's fill in a meaningful value.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
(no changes since v1)
hw/ppc/e500.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index c795276..01517a6 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -126,7 +126,7 @@ static void dt_serial_create(void *fdt, unsigned long long offset,
qemu_fdt_setprop_string(fdt, ser, "compatible", "ns16550");
qemu_fdt_setprop_cells(fdt, ser, "reg", offset, 0x100);
qemu_fdt_setprop_cell(fdt, ser, "cell-index", idx);
- qemu_fdt_setprop_cell(fdt, ser, "clock-frequency", 0);
+ qemu_fdt_setprop_cell(fdt, ser, "clock-frequency", PLATFORM_CLK_FREQ_HZ);
qemu_fdt_setprop_cells(fdt, ser, "interrupts", 42, 2);
qemu_fdt_setprop_phandle(fdt, ser, "interrupt-parent", mpic);
qemu_fdt_setprop_string(fdt, "/aliases", alias, ser);
--
2.7.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] hw/ppc: e500: Use a macro for the platform clock frequency
2021-02-03 14:24 [PATCH v2 1/2] hw/ppc: e500: Use a macro for the platform clock frequency Bin Meng
2021-02-03 14:24 ` [PATCH v2 2/2] hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes Bin Meng
@ 2021-02-04 2:59 ` David Gibson
1 sibling, 0 replies; 6+ messages in thread
From: David Gibson @ 2021-02-04 2:59 UTC (permalink / raw)
To: Bin Meng
Cc: Bin Meng, Philippe Mathieu-Daudé, qemu-ppc, Greg Kurz,
qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1964 bytes --]
On Wed, Feb 03, 2021 at 10:24:47PM +0800, Bin Meng wrote:
> From: Bin Meng <bin.meng@windriver.com>
>
> At present the platform clock frequency is using a magic number.
> Convert it to a macro and use it everywhere.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Applied to ppc-for-6.0, thanks.
>
> ---
>
> Changes in v2:
> - Rename the macro per Philippe's comments
>
> hw/ppc/e500.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index c64b5d0..c795276 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -74,6 +74,8 @@
> #define MPC8544_I2C_IRQ 43
> #define RTC_REGS_OFFSET 0x68
>
> +#define PLATFORM_CLK_FREQ_HZ (400 * 1000 * 1000)
> +
> struct boot_info
> {
> uint32_t dt_base;
> @@ -320,8 +322,8 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
> int fdt_size;
> void *fdt;
> uint8_t hypercall[16];
> - uint32_t clock_freq = 400000000;
> - uint32_t tb_freq = 400000000;
> + uint32_t clock_freq = PLATFORM_CLK_FREQ_HZ;
> + uint32_t tb_freq = PLATFORM_CLK_FREQ_HZ;
> int i;
> char compatible_sb[] = "fsl,mpc8544-immr\0simple-bus";
> char *soc;
> @@ -890,7 +892,7 @@ void ppce500_init(MachineState *machine)
> env->spr_cb[SPR_BOOKE_PIR].default_value = cs->cpu_index = i;
> env->mpic_iack = pmc->ccsrbar_base + MPC8544_MPIC_REGS_OFFSET + 0xa0;
>
> - ppc_booke_timers_init(cpu, 400000000, PPC_TIMER_E500);
> + ppc_booke_timers_init(cpu, PLATFORM_CLK_FREQ_HZ, PPC_TIMER_E500);
>
> /* Register reset handler */
> if (!i) {
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 2/2] hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes
2021-02-03 14:24 ` [PATCH v2 2/2] hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes Bin Meng
@ 2021-02-04 2:59 ` David Gibson
2021-02-04 5:05 ` Bin Meng
0 siblings, 1 reply; 6+ messages in thread
From: David Gibson @ 2021-02-04 2:59 UTC (permalink / raw)
To: Bin Meng
Cc: Bin Meng, Philippe Mathieu-Daudé, qemu-ppc, Greg Kurz,
qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1641 bytes --]
On Wed, Feb 03, 2021 at 10:24:48PM +0800, Bin Meng wrote:
> From: Bin Meng <bin.meng@windriver.com>
>
> At present the <clock-frequency> property of the serial node is
> populated with value zero. U-Boot's ns16550 driver is not happy
> about this, so let's fill in a meaningful value.
Are you sure this is correct - that is that the serial clock is really
the same as the overall system clock? Quite often there's some kind
of divider in between.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
> ---
>
> (no changes since v1)
>
> hw/ppc/e500.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index c795276..01517a6 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -126,7 +126,7 @@ static void dt_serial_create(void *fdt, unsigned long long offset,
> qemu_fdt_setprop_string(fdt, ser, "compatible", "ns16550");
> qemu_fdt_setprop_cells(fdt, ser, "reg", offset, 0x100);
> qemu_fdt_setprop_cell(fdt, ser, "cell-index", idx);
> - qemu_fdt_setprop_cell(fdt, ser, "clock-frequency", 0);
> + qemu_fdt_setprop_cell(fdt, ser, "clock-frequency", PLATFORM_CLK_FREQ_HZ);
> qemu_fdt_setprop_cells(fdt, ser, "interrupts", 42, 2);
> qemu_fdt_setprop_phandle(fdt, ser, "interrupt-parent", mpic);
> qemu_fdt_setprop_string(fdt, "/aliases", alias, ser);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 2/2] hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes
2021-02-04 2:59 ` David Gibson
@ 2021-02-04 5:05 ` Bin Meng
2021-02-04 23:51 ` David Gibson
0 siblings, 1 reply; 6+ messages in thread
From: Bin Meng @ 2021-02-04 5:05 UTC (permalink / raw)
To: David Gibson
Cc: Bin Meng, Philippe Mathieu-Daudé, qemu-ppc, Greg Kurz,
qemu-devel@nongnu.org Developers
On Thu, Feb 4, 2021 at 12:58 PM David Gibson
<david@gibson.dropbear.id.au> wrote:
>
> On Wed, Feb 03, 2021 at 10:24:48PM +0800, Bin Meng wrote:
> > From: Bin Meng <bin.meng@windriver.com>
> >
> > At present the <clock-frequency> property of the serial node is
> > populated with value zero. U-Boot's ns16550 driver is not happy
> > about this, so let's fill in a meaningful value.
>
> Are you sure this is correct - that is that the serial clock is really
> the same as the overall system clock? Quite often there's some kind
> of divider in between.
>
Yes, see the U-Boot codes include/configs/qemu-ppce500.h
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
get_bus_freq(0) eventually returns the platform clock frequency which is 400MHz.
But the value doesn't matter anyway for QEMU. We don't emulate any
baud rate specific thing for a serial port. We only need a sane value
that is non-zero.
Regards,
Bin
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 2/2] hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes
2021-02-04 5:05 ` Bin Meng
@ 2021-02-04 23:51 ` David Gibson
0 siblings, 0 replies; 6+ messages in thread
From: David Gibson @ 2021-02-04 23:51 UTC (permalink / raw)
To: Bin Meng
Cc: Bin Meng, Philippe Mathieu-Daudé, qemu-ppc, Greg Kurz,
qemu-devel@nongnu.org Developers
[-- Attachment #1: Type: text/plain, Size: 1276 bytes --]
On Thu, Feb 04, 2021 at 01:05:19PM +0800, Bin Meng wrote:
> On Thu, Feb 4, 2021 at 12:58 PM David Gibson
> <david@gibson.dropbear.id.au> wrote:
> >
> > On Wed, Feb 03, 2021 at 10:24:48PM +0800, Bin Meng wrote:
> > > From: Bin Meng <bin.meng@windriver.com>
> > >
> > > At present the <clock-frequency> property of the serial node is
> > > populated with value zero. U-Boot's ns16550 driver is not happy
> > > about this, so let's fill in a meaningful value.
> >
> > Are you sure this is correct - that is that the serial clock is really
> > the same as the overall system clock? Quite often there's some kind
> > of divider in between.
> >
>
> Yes, see the U-Boot codes include/configs/qemu-ppce500.h
>
> #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
>
> get_bus_freq(0) eventually returns the platform clock frequency which is 400MHz.
>
> But the value doesn't matter anyway for QEMU. We don't emulate any
> baud rate specific thing for a serial port. We only need a sane value
> that is non-zero.
Understood. Applied to ppc-for-6.0.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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2021-02-03 14:24 [PATCH v2 1/2] hw/ppc: e500: Use a macro for the platform clock frequency Bin Meng
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