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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id hr3sm3883275ejc.41.2021.02.05.06.44.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Feb 2021 06:44:37 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [RFC PATCH 9/9] tests/qtest/arm-cpu-features: Restrict TCG-only tests Date: Fri, 5 Feb 2021 15:43:45 +0100 Message-Id: <20210205144345.2068758-10-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210205144345.2068758-1-f4bug@amsat.org> References: <20210205144345.2068758-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ed1-x52a.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Peter Maydell , Thomas Huth , qemu-block@nongnu.org, Andrew Jones , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Roman Bolshakov , qemu-arm@nongnu.org, Claudio Fontana , Paolo Bonzini , John Snow Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Some tests explicitly request the TCG accelerator. As these tests will obviously fails if TCG is not present, disable them in such case. Signed-off-by: Philippe Mathieu-Daudé --- Cc: Roman Bolshakov Cc: Claudio Fontana RFC because of the TODO. Roman posted a series to have a QMP command to query enabled accelerators. --- tests/qtest/arm-cpu-features.c | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c index c59c3cb002b..c6e86282b66 100644 --- a/tests/qtest/arm-cpu-features.c +++ b/tests/qtest/arm-cpu-features.c @@ -20,7 +20,7 @@ */ #define SVE_MAX_VQ 16 -#define MACHINE "-machine virt,gic-version=max -accel tcg " +#define MACHINE_TCG "-machine virt,gic-version=max -accel tcg " #define MACHINE_KVM "-machine virt,gic-version=max -accel kvm -accel tcg " #define QUERY_HEAD "{ 'execute': 'query-cpu-model-expansion', " \ " 'arguments': { 'type': 'full', " @@ -41,6 +41,16 @@ static bool kvm_enabled(QTestState *qts) return enabled; } +static bool tcg_enabled(QTestState *qts) +{ + /* TODO: Implement QMP query-accel? */ +#ifdef CONFIG_TCG + return true; +#else + return false; +#endif /* CONFIG_TCG */ +} + static QDict *do_query_no_props(QTestState *qts, const char *cpu_type) { return qtest_qmp(qts, QUERY_HEAD "'model': { 'name': %s }" @@ -352,7 +362,12 @@ static void sve_tests_sve_max_vq_8(const void *data) { QTestState *qts; - qts = qtest_init(MACHINE "-cpu max,sve-max-vq=8"); + qts = qtest_init(MACHINE_TCG "-cpu max,sve-max-vq=8"); + + if (!tcg_enabled(qts)) { + qtest_quit(qts); + return; + } assert_sve_vls(qts, "max", BIT_ULL(8) - 1, NULL); @@ -387,7 +402,12 @@ static void sve_tests_sve_off(const void *data) { QTestState *qts; - qts = qtest_init(MACHINE "-cpu max,sve=off"); + qts = qtest_init(MACHINE_TCG "-cpu max,sve=off"); + + if (!tcg_enabled(qts)) { + qtest_quit(qts); + return; + } /* SVE is off, so the map should be empty. */ assert_sve_vls(qts, "max", 0, NULL); @@ -443,7 +463,12 @@ static void test_query_cpu_model_expansion(const void *data) { QTestState *qts; - qts = qtest_init(MACHINE "-cpu max"); + qts = qtest_init(MACHINE_TCG "-cpu max"); + + if (!tcg_enabled(qts)) { + qtest_quit(qts); + return; + } /* Test common query-cpu-model-expansion input validation */ assert_type_full(qts); -- 2.26.2