From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: sw@weilnetz.de
Subject: [PATCH v3 59/70] tcg/tci: Emit setcond before brcond
Date: Sun, 7 Feb 2021 18:37:41 -0800 [thread overview]
Message-ID: <20210208023752.270606-60-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210208023752.270606-1-richard.henderson@linaro.org>
The encoding planned for tci does not have enough room for
brcond2, with 4 registers and a condition as input as well
as the label. Resolve the condition into TCG_REG_TMP, and
relax brcond to one register plus a label, considering the
condition to always be reg != 0.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tci.c | 68 ++++++++++------------------------------
tcg/tci/tcg-target.c.inc | 52 +++++++++++-------------------
2 files changed, 35 insertions(+), 85 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index d27db9f720..e7268b13e1 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -141,6 +141,16 @@ static void tci_args_nl(const uint8_t **tb_ptr, uint8_t *n0, void **l1)
check_size(start, tb_ptr);
}
+static void tci_args_rl(const uint8_t **tb_ptr, TCGReg *r0, void **l1)
+{
+ const uint8_t *start = *tb_ptr;
+
+ *r0 = tci_read_r(tb_ptr);
+ *l1 = (void *)tci_read_label(tb_ptr);
+
+ check_size(start, tb_ptr);
+}
+
static void tci_args_rr(const uint8_t **tb_ptr,
TCGReg *r0, TCGReg *r1)
{
@@ -212,19 +222,6 @@ static void tci_args_rrs(const uint8_t **tb_ptr,
check_size(start, tb_ptr);
}
-static void tci_args_rrcl(const uint8_t **tb_ptr,
- TCGReg *r0, TCGReg *r1, TCGCond *c2, void **l3)
-{
- const uint8_t *start = *tb_ptr;
-
- *r0 = tci_read_r(tb_ptr);
- *r1 = tci_read_r(tb_ptr);
- *c2 = tci_read_b(tb_ptr);
- *l3 = (void *)tci_read_label(tb_ptr);
-
- check_size(start, tb_ptr);
-}
-
static void tci_args_rrrc(const uint8_t **tb_ptr,
TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3)
{
@@ -293,21 +290,6 @@ static void tci_args_rrrr(const uint8_t **tb_ptr,
check_size(start, tb_ptr);
}
-static void tci_args_rrrrcl(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1,
- TCGReg *r2, TCGReg *r3, TCGCond *c4, void **l5)
-{
- const uint8_t *start = *tb_ptr;
-
- *r0 = tci_read_r(tb_ptr);
- *r1 = tci_read_r(tb_ptr);
- *r2 = tci_read_r(tb_ptr);
- *r3 = tci_read_r(tb_ptr);
- *c4 = tci_read_b(tb_ptr);
- *l5 = (void *)tci_read_label(tb_ptr);
-
- check_size(start, tb_ptr);
-}
-
static void tci_args_rrrrrc(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1,
TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGCond *c5)
{
@@ -723,8 +705,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
break;
#endif
case INDEX_op_brcond_i32:
- tci_args_rrcl(&tb_ptr, &r0, &r1, &condition, &ptr);
- if (tci_compare32(regs[r0], regs[r1], condition)) {
+ tci_args_rl(&tb_ptr, &r0, &ptr);
+ if ((uint32_t)regs[r0]) {
tb_ptr = ptr;
}
break;
@@ -741,15 +723,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
T2 = tci_uint64(regs[r5], regs[r4]);
tci_write_reg64(regs, r1, r0, T1 - T2);
break;
- case INDEX_op_brcond2_i32:
- tci_args_rrrrcl(&tb_ptr, &r0, &r1, &r2, &r3, &condition, &ptr);
- T1 = tci_uint64(regs[r1], regs[r0]);
- T2 = tci_uint64(regs[r3], regs[r2]);
- if (tci_compare64(T1, T2, condition)) {
- tb_ptr = ptr;
- continue;
- }
- break;
case INDEX_op_mulu2_i32:
tci_args_rrrr(&tb_ptr, &r0, &r1, &r2, &r3);
tci_write_reg64(regs, r1, r0, (uint64_t)regs[r2] * regs[r3]);
@@ -877,8 +850,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
break;
#endif
case INDEX_op_brcond_i64:
- tci_args_rrcl(&tb_ptr, &r0, &r1, &condition, &ptr);
- if (tci_compare64(regs[r0], regs[r1], condition)) {
+ tci_args_rl(&tb_ptr, &r0, &ptr);
+ if (regs[r0]) {
tb_ptr = ptr;
}
break;
@@ -1188,9 +1161,9 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info)
case INDEX_op_brcond_i32:
case INDEX_op_brcond_i64:
- tci_args_rrcl(&tb_ptr, &r0, &r1, &c, &ptr);
- info->fprintf_func(info->stream, "%-12s %s,%s,%s,%p",
- op_name, str_r(r0), str_r(r1), str_c(c), ptr);
+ tci_args_rl(&tb_ptr, &r0, &ptr);
+ info->fprintf_func(info->stream, "%-12s %s,0,ne,%p",
+ op_name, str_r(r0), ptr);
break;
case INDEX_op_setcond_i32:
@@ -1315,13 +1288,6 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info)
str_r(r3), str_r(r4), str_c(c));
break;
- case INDEX_op_brcond2_i32:
- tci_args_rrrrcl(&tb_ptr, &r0, &r1, &r2, &r3, &c, &ptr);
- info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%s,%p",
- op_name, str_r(r0), str_r(r1),
- str_r(r2), str_r(r3), str_c(c), ptr);
- break;
-
case INDEX_op_mulu2_i32:
tci_args_rrrr(&tb_ptr, &r0, &r1, &r2, &r3);
info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s",
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index b29e75425d..e06d4e9380 100644
--- a/tcg/tci/tcg-target.c.inc
+++ b/tcg/tci/tcg-target.c.inc
@@ -349,6 +349,17 @@ static void tcg_out_op_rI(TCGContext *s, TCGOpcode op,
}
#endif
+static void tcg_out_op_rl(TCGContext *s, TCGOpcode op, TCGReg r0, TCGLabel *l1)
+{
+ uint8_t *old_code_ptr = s->code_ptr;
+
+ tcg_out_op_t(s, op);
+ tcg_out_r(s, r0);
+ tci_out_label(s, l1);
+
+ old_code_ptr[1] = s->code_ptr - old_code_ptr;
+}
+
static void tcg_out_op_rr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1)
{
uint8_t *old_code_ptr = s->code_ptr;
@@ -400,20 +411,6 @@ static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op,
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
-static void tcg_out_op_rrcl(TCGContext *s, TCGOpcode op,
- TCGReg r0, TCGReg r1, TCGCond c2, TCGLabel *l3)
-{
- uint8_t *old_code_ptr = s->code_ptr;
-
- tcg_out_op_t(s, op);
- tcg_out_r(s, r0);
- tcg_out_r(s, r1);
- tcg_out8(s, c2);
- tci_out_label(s, l3);
-
- old_code_ptr[1] = s->code_ptr - old_code_ptr;
-}
-
static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode op,
TCGReg r0, TCGReg r1, TCGReg r2, TCGCond c3)
{
@@ -487,23 +484,6 @@ static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode op,
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
-static void tcg_out_op_rrrrcl(TCGContext *s, TCGOpcode op,
- TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3,
- TCGCond c4, TCGLabel *l5)
-{
- uint8_t *old_code_ptr = s->code_ptr;
-
- tcg_out_op_t(s, op);
- tcg_out_r(s, r0);
- tcg_out_r(s, r1);
- tcg_out_r(s, r2);
- tcg_out_r(s, r3);
- tcg_out8(s, c4);
- tci_out_label(s, l5);
-
- old_code_ptr[1] = s->code_ptr - old_code_ptr;
-}
-
static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op,
TCGReg r0, TCGReg r1, TCGReg r2,
TCGReg r3, TCGReg r4, TCGCond c5)
@@ -704,7 +684,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
break;
CASE_32_64(brcond)
- tcg_out_op_rrcl(s, opc, args[0], args[1], args[2], arg_label(args[3]));
+ tcg_out_op_rrrc(s, (opc == INDEX_op_brcond_i32
+ ? INDEX_op_setcond_i32 : INDEX_op_setcond_i64),
+ TCG_REG_TMP, args[0], args[1], args[2]);
+ tcg_out_op_rl(s, opc, TCG_REG_TMP, arg_label(args[3]));
break;
CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */
@@ -730,8 +713,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
args[3], args[4], args[5]);
break;
case INDEX_op_brcond2_i32:
- tcg_out_op_rrrrcl(s, opc, args[0], args[1], args[2],
- args[3], args[4], arg_label(args[5]));
+ tcg_out_op_rrrrrc(s, INDEX_op_setcond2_i32, TCG_REG_TMP,
+ args[0], args[1], args[2], args[3], args[4]);
+ tcg_out_op_rl(s, INDEX_op_brcond_i32, TCG_REG_TMP, arg_label(args[5]));
break;
case INDEX_op_mulu2_i32:
tcg_out_op_rrrr(s, opc, args[0], args[1], args[2], args[3]);
--
2.25.1
next prev parent reply other threads:[~2021-02-08 3:21 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-08 2:36 [PATCH v3 00/70] TCI fixes and cleanups Richard Henderson
2021-02-08 2:36 ` [PATCH v3 01/70] gdbstub: Fix handle_query_xfer_auxv Richard Henderson
2021-02-08 2:36 ` [PATCH v3 02/70] tcg: Split out tcg_raise_tb_overflow Richard Henderson
2021-03-05 14:48 ` Alex Bennée
2021-02-08 2:36 ` [PATCH v3 03/70] tcg: Manage splitwx in tc_ptr_to_region_tree by hand Richard Henderson
2021-03-05 15:28 ` Alex Bennée
2021-02-08 2:36 ` [PATCH v3 04/70] tcg/tci: Merge identical cases in generation Richard Henderson
2021-03-05 16:29 ` Alex Bennée
2021-02-08 2:36 ` [PATCH v3 05/70] tcg/tci: Remove tci_read_r8 Richard Henderson
2021-03-05 16:34 ` Alex Bennée
2021-02-08 2:36 ` [PATCH v3 06/70] tcg/tci: Remove tci_read_r8s Richard Henderson
2021-02-08 2:36 ` [PATCH v3 07/70] tcg/tci: Remove tci_read_r16 Richard Henderson
2021-02-08 2:36 ` [PATCH v3 08/70] tcg/tci: Remove tci_read_r16s Richard Henderson
2021-02-08 2:36 ` [PATCH v3 09/70] tcg/tci: Remove tci_read_r32 Richard Henderson
2021-02-08 2:36 ` [PATCH v3 10/70] tcg/tci: Remove tci_read_r32s Richard Henderson
2021-02-08 2:36 ` [PATCH v3 11/70] tcg/tci: Reduce use of tci_read_r64 Richard Henderson
2021-02-08 2:36 ` [PATCH v3 12/70] tcg/tci: Merge basic arithmetic operations Richard Henderson
2021-02-08 2:36 ` [PATCH v3 13/70] tcg/tci: Merge extension operations Richard Henderson
2021-02-08 2:36 ` [PATCH v3 14/70] tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us]_i64 Richard Henderson
2021-02-08 2:36 ` [PATCH v3 15/70] tcg/tci: Merge bswap operations Richard Henderson
2021-02-08 2:36 ` [PATCH v3 16/70] tcg/tci: Merge mov, not and neg operations Richard Henderson
2021-02-08 2:36 ` [PATCH v3 17/70] tcg/tci: Rename tci_read_r to tci_read_rval Richard Henderson
2021-02-08 2:37 ` [PATCH v3 18/70] tcg/tci: Split out tci_args_rrs Richard Henderson
2021-02-08 2:37 ` [PATCH v3 19/70] tcg/tci: Split out tci_args_rr Richard Henderson
2021-02-08 2:37 ` [PATCH v3 20/70] tcg/tci: Split out tci_args_rrr Richard Henderson
2021-02-08 2:37 ` [PATCH v3 21/70] tcg/tci: Split out tci_args_rrrc Richard Henderson
2021-02-08 2:37 ` [PATCH v3 22/70] tcg/tci: Split out tci_args_l Richard Henderson
2021-02-08 2:37 ` [PATCH v3 23/70] tcg/tci: Split out tci_args_rrrrrc Richard Henderson
2021-02-08 2:37 ` [PATCH v3 24/70] tcg/tci: Split out tci_args_rrcl and tci_args_rrrrcl Richard Henderson
2021-02-08 2:37 ` [PATCH v3 25/70] tcg/tci: Split out tci_args_ri and tci_args_rI Richard Henderson
2021-02-08 2:37 ` [PATCH v3 26/70] tcg/tci: Reuse tci_args_l for calls Richard Henderson
2021-02-08 2:37 ` [PATCH v3 27/70] tcg/tci: Reuse tci_args_l for exit_tb Richard Henderson
2021-02-08 2:37 ` [PATCH v3 28/70] tcg/tci: Reuse tci_args_l for goto_tb Richard Henderson
2021-02-08 2:37 ` [PATCH v3 29/70] tcg/tci: Split out tci_args_rrrrrr Richard Henderson
2021-02-08 2:37 ` [PATCH v3 30/70] tcg/tci: Split out tci_args_rrrr Richard Henderson
2021-02-08 2:37 ` [PATCH v3 31/70] tcg/tci: Clean up deposit operations Richard Henderson
2021-02-08 2:37 ` [PATCH v3 32/70] tcg/tci: Reduce qemu_ld/st TCGMemOpIdx operand to 32-bits Richard Henderson
2021-02-08 2:37 ` [PATCH v3 33/70] tcg/tci: Split out tci_args_{rrm,rrrm,rrrrm} Richard Henderson
2021-02-08 2:37 ` [PATCH v3 34/70] tcg/tci: Hoist op_size checking into tci_args_* Richard Henderson
2021-02-08 2:37 ` [PATCH v3 35/70] tcg/tci: Remove tci_disas Richard Henderson
2021-02-08 2:37 ` [PATCH v3 36/70] tcg/tci: Implement the disassembler properly Richard Henderson
2021-02-08 2:37 ` [PATCH v3 37/70] tcg: Build ffi data structures for helpers Richard Henderson
2021-02-08 2:37 ` [PATCH v3 38/70] tcg/tci: Use ffi for calls Richard Henderson
2021-02-08 2:37 ` [PATCH v3 39/70] tcg/tci: Improve tcg_target_call_clobber_regs Richard Henderson
2021-02-08 2:37 ` [PATCH v3 40/70] tcg/tci: Move call-return regs to end of tcg_target_reg_alloc_order Richard Henderson
2021-02-08 2:37 ` [PATCH v3 41/70] tcg/tci: Push opcode emit into each case Richard Henderson
2021-02-08 2:37 ` [PATCH v3 42/70] tcg/tci: Split out tcg_out_op_rrs Richard Henderson
2021-02-08 2:37 ` [PATCH v3 43/70] tcg/tci: Split out tcg_out_op_l Richard Henderson
2021-02-08 2:37 ` [PATCH v3 44/70] tcg/tci: Split out tcg_out_op_p Richard Henderson
2021-02-08 2:37 ` [PATCH v3 45/70] tcg/tci: Split out tcg_out_op_rr Richard Henderson
2021-02-08 2:37 ` [PATCH v3 46/70] tcg/tci: Split out tcg_out_op_rrr Richard Henderson
2021-02-08 2:37 ` [PATCH v3 47/70] tcg/tci: Split out tcg_out_op_rrrc Richard Henderson
2021-02-08 2:37 ` [PATCH v3 48/70] tcg/tci: Split out tcg_out_op_rrrrrc Richard Henderson
2021-02-08 2:37 ` [PATCH v3 49/70] tcg/tci: Split out tcg_out_op_rrrbb Richard Henderson
2021-02-08 2:37 ` [PATCH v3 50/70] tcg/tci: Split out tcg_out_op_rrcl Richard Henderson
2021-02-08 2:37 ` [PATCH v3 51/70] tcg/tci: Split out tcg_out_op_rrrrrr Richard Henderson
2021-02-08 2:37 ` [PATCH v3 52/70] tcg/tci: Split out tcg_out_op_rrrr Richard Henderson
2021-02-08 2:37 ` [PATCH v3 53/70] tcg/tci: Split out tcg_out_op_rrrrcl Richard Henderson
2021-02-08 2:37 ` [PATCH v3 54/70] tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm} Richard Henderson
2021-02-08 2:37 ` [PATCH v3 55/70] tcg/tci: Split out tcg_out_op_v Richard Henderson
2021-02-08 2:37 ` [PATCH v3 56/70] tcg/tci: Split out tcg_out_op_np Richard Henderson
2021-02-08 2:37 ` [PATCH v3 57/70] tcg/tci: Split out tcg_out_op_r[iI] Richard Henderson
2021-02-08 2:37 ` [PATCH v3 58/70] tcg/tci: Reserve r13 for a temporary Richard Henderson
2021-02-08 2:37 ` Richard Henderson [this message]
2021-02-08 2:37 ` [PATCH v3 60/70] tcg/tci: Remove tci_write_reg Richard Henderson
2021-02-08 2:37 ` [PATCH v3 61/70] tcg/tci: Change encoding to uint32_t units Richard Henderson
2021-02-08 2:37 ` [PATCH v3 62/70] tcg/tci: Implement goto_ptr Richard Henderson
2021-02-08 2:37 ` [PATCH v3 63/70] tcg/tci: Implement movcond Richard Henderson
2021-02-08 2:37 ` [PATCH v3 64/70] tcg/tci: Implement andc, orc, eqv, nand, nor Richard Henderson
2021-02-08 2:37 ` [PATCH v3 65/70] tcg/tci: Implement extract, sextract Richard Henderson
2021-02-08 2:37 ` [PATCH v3 66/70] tcg/tci: Implement clz, ctz, ctpop Richard Henderson
2021-02-08 2:37 ` [PATCH v3 67/70] tcg/tci: Implement mulu2, muls2 Richard Henderson
2021-02-08 2:37 ` [PATCH v3 68/70] tcg/tci: Implement add2, sub2 Richard Henderson
2021-02-08 2:37 ` [PATCH v3 69/70] tests/tcg: Increase timeout for TCI Richard Henderson
2021-02-08 2:37 ` [PATCH v3 70/70] gitlab: Enable cross-i386 builds of TCI Richard Henderson
2021-02-17 17:25 ` Philippe Mathieu-Daudé
2021-02-08 3:45 ` [PATCH v3 00/70] TCI fixes and cleanups no-reply
2021-03-05 16:37 ` Alex Bennée
2021-03-05 16:55 ` Alex Bennée
2021-03-05 16:59 ` Alex Bennée
2021-03-05 16:55 ` Philippe Mathieu-Daudé
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