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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH v2 15/15] tcg/arm: Implement TCG_TARGET_HAS_rotv_vec
Date: Sun,  7 Feb 2021 18:46:25 -0800	[thread overview]
Message-ID: <20210208024625.271018-16-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210208024625.271018-1-richard.henderson@linaro.org>

Implement via expansion, so don't actually set TCG_TARGET_HAS_rotv_vec.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/arm/tcg-target.c.inc | 35 ++++++++++++++++++++++++++++++++++-
 1 file changed, 34 insertions(+), 1 deletion(-)

diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index 3150aae8d6..a930d51e92 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -2977,6 +2977,8 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece)
     case INDEX_op_shrv_vec:
     case INDEX_op_sarv_vec:
     case INDEX_op_rotli_vec:
+    case INDEX_op_rotlv_vec:
+    case INDEX_op_rotrv_vec:
         return -1;
     default:
         return 0;
@@ -2987,7 +2989,7 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
                        TCGArg a0, ...)
 {
     va_list va;
-    TCGv_vec v0, v1, v2, t1;
+    TCGv_vec v0, v1, v2, t1, t2, c1;
     TCGArg a2;
 
     va_start(va, a0);
@@ -3032,6 +3034,37 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
         tcg_temp_free_vec(t1);
         break;
 
+    case INDEX_op_rotlv_vec:
+        v2 = temp_tcgv_vec(arg_temp(a2));
+        t1 = tcg_temp_new_vec(type);
+        c1 = tcg_constant_vec(type, vece, 8 << vece);
+        tcg_gen_sub_vec(vece, t1, v2, c1);
+        /* Right shifts are negative left shifts for NEON.  */
+        vec_gen_3(INDEX_op_arm_ushl_vec, type, vece, tcgv_vec_arg(t1),
+                  tcgv_vec_arg(v1), tcgv_vec_arg(t1));
+        vec_gen_3(INDEX_op_arm_ushl_vec, type, vece, tcgv_vec_arg(v0),
+                  tcgv_vec_arg(v1), tcgv_vec_arg(v2));
+        tcg_gen_or_vec(vece, v0, v0, t1);
+        tcg_temp_free_vec(t1);
+        break;
+
+    case INDEX_op_rotrv_vec:
+        v2 = temp_tcgv_vec(arg_temp(a2));
+        t1 = tcg_temp_new_vec(type);
+        t2 = tcg_temp_new_vec(type);
+        c1 = tcg_constant_vec(type, vece, 8 << vece);
+        tcg_gen_neg_vec(vece, t1, v2);
+        tcg_gen_sub_vec(vece, t2, c1, v2);
+        /* Right shifts are negative left shifts for NEON.  */
+        vec_gen_3(INDEX_op_arm_ushl_vec, type, vece, tcgv_vec_arg(t1),
+                  tcgv_vec_arg(v1), tcgv_vec_arg(t1));
+        vec_gen_3(INDEX_op_arm_ushl_vec, type, vece, tcgv_vec_arg(t2),
+                  tcgv_vec_arg(v1), tcgv_vec_arg(t2));
+        tcg_gen_or_vec(vece, v0, t1, t2);
+        tcg_temp_free_vec(t1);
+        tcg_temp_free_vec(t2);
+        break;
+
     default:
         g_assert_not_reached();
     }
-- 
2.25.1



  parent reply	other threads:[~2021-02-08  4:03 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-08  2:46 [PATCH v2 00/15] tcg/arm: host neon support Richard Henderson
2021-02-08  2:46 ` [PATCH v2 01/15] tcg: Change parameters for tcg_target_const_match Richard Henderson
2021-02-08 17:43   ` Peter Maydell
2021-02-08  2:46 ` [PATCH v2 02/15] tcg/arm: Add host vector framework Richard Henderson
2021-02-08 17:53   ` Peter Maydell
2021-02-08 18:28     ` Peter Maydell
2021-02-08 18:58       ` Richard Henderson
2021-02-08 19:30         ` Peter Maydell
2021-02-08 22:26           ` Richard Henderson
2021-02-08  2:46 ` [PATCH v2 03/15] tcg/arm: Implement tcg_out_ld/st for vector types Richard Henderson
2021-02-08 17:56   ` Peter Maydell
2021-02-08  2:46 ` [PATCH v2 04/15] tcg/arm: Implement tcg_out_mov " Richard Henderson
2021-02-08 18:02   ` Peter Maydell
2021-02-08  2:46 ` [PATCH v2 05/15] tcg/arm: Implement tcg_out_dup*_vec Richard Henderson
2021-02-08 18:14   ` Peter Maydell
2021-02-08  2:46 ` [PATCH v2 06/15] tcg/arm: Implement minimal vector operations Richard Henderson
2021-02-08 18:20   ` Peter Maydell
2021-02-08  2:46 ` [PATCH v2 07/15] tcg/arm: Implement andc, orc, abs, neg, not " Richard Henderson
2021-02-08 18:22   ` Peter Maydell
2021-02-08  2:46 ` [PATCH v2 08/15] tcg/arm: Implement TCG_TARGET_HAS_shi_vec Richard Henderson
2021-02-08 19:35   ` Peter Maydell
2021-02-08  2:46 ` [PATCH v2 09/15] tcg/arm: Implement TCG_TARGET_HAS_mul_vec Richard Henderson
2021-02-08 19:36   ` Peter Maydell
2021-02-08  2:46 ` [PATCH v2 10/15] tcg/arm: Implement TCG_TARGET_HAS_sat_vec Richard Henderson
2021-02-08 19:36   ` Peter Maydell
2021-02-08  2:46 ` [PATCH v2 11/15] tcg/arm: Implement TCG_TARGET_HAS_minmax_vec Richard Henderson
2021-02-08 19:38   ` Peter Maydell
2021-02-08  2:46 ` [PATCH v2 12/15] tcg/arm: Implement TCG_TARGET_HAS_bitsel_vec Richard Henderson
2021-02-08 19:55   ` Peter Maydell
2021-02-08 22:27     ` Richard Henderson
2021-02-08  2:46 ` [PATCH v2 13/15] tcg/arm: Implement TCG_TARGET_HAS_shv_vec Richard Henderson
2021-02-08 20:50   ` Peter Maydell
2021-02-08 22:27     ` Richard Henderson
2021-02-08  2:46 ` [PATCH v2 14/15] tcg/arm: Implement TCG_TARGET_HAS_roti_vec Richard Henderson
2021-02-08 20:51   ` Peter Maydell
2021-02-08  2:46 ` Richard Henderson [this message]
2021-02-08 20:52   ` [PATCH v2 15/15] tcg/arm: Implement TCG_TARGET_HAS_rotv_vec Peter Maydell

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