From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Anthony Green" <green@moxielogic.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Michael Walle" <michael@walle.cc>,
robhenry@microsoft.com, mahmoudabdalghany@outlook.com,
aaron@os.amperecomputing.com, cota@braap.org,
"Paolo Bonzini" <pbonzini@redhat.com>,
kuhn.chenqun@huawei.com, "Guan Xuetao" <gxt@mprc.pku.edu.cn>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>
Subject: [PATCH v2 10/21] exec: Move TranslationBlock typedef to qemu/typedefs.h
Date: Wed, 10 Feb 2021 22:10:42 +0000 [thread overview]
Message-ID: <20210210221053.18050-11-alex.bennee@linaro.org> (raw)
In-Reply-To: <20210210221053.18050-1-alex.bennee@linaro.org>
From: Richard Henderson <richard.henderson@linaro.org>
This also means we don't need an extra declaration of
the structure in hw/core/cpu.h.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210208233906.479571-2-richard.henderson@linaro.org>
Message-Id: <20210209182749.31323-2-alex.bennee@linaro.org>
---
include/exec/tb-context.h | 1 -
include/hw/core/cpu.h | 4 +---
include/hw/core/tcg-cpu-ops.h | 3 +--
include/qemu/typedefs.h | 1 +
target/arm/internals.h | 3 +--
target/cris/translate.c | 2 +-
target/lm32/translate.c | 2 +-
target/moxie/translate.c | 2 +-
target/unicore32/translate.c | 2 +-
9 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/include/exec/tb-context.h b/include/exec/tb-context.h
index ec4c13b455..cc33979113 100644
--- a/include/exec/tb-context.h
+++ b/include/exec/tb-context.h
@@ -26,7 +26,6 @@
#define CODE_GEN_HTABLE_BITS 15
#define CODE_GEN_HTABLE_SIZE (1 << CODE_GEN_HTABLE_BITS)
-typedef struct TranslationBlock TranslationBlock;
typedef struct TBContext TBContext;
struct TBContext {
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 38d813c389..c005d3dc2d 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -74,8 +74,6 @@ typedef enum MMUAccessType {
typedef struct CPUWatchpoint CPUWatchpoint;
-struct TranslationBlock;
-
/* see tcg-cpu-ops.h */
struct TCGCPUOps;
@@ -375,7 +373,7 @@ struct CPUState {
IcountDecr *icount_decr_ptr;
/* Accessed in parallel; all accesses must be atomic */
- struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
+ TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
struct GDBRegisterState *gdb_regs;
int gdb_num_regs;
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
index ccc97d1894..ac3bb051f2 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -30,8 +30,7 @@ struct TCGCPUOps {
* If more state needs to be restored, the target must implement a
* function to restore all the state, and register it here.
*/
- void (*synchronize_from_tb)(CPUState *cpu,
- const struct TranslationBlock *tb);
+ void (*synchronize_from_tb)(CPUState *cpu, const TranslationBlock *tb);
/** @cpu_exec_enter: Callback for cpu_exec preparation */
void (*cpu_exec_enter)(CPUState *cpu);
/** @cpu_exec_exit: Callback for cpu_exec cleanup */
diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h
index dc39b05c30..ee60eb3de4 100644
--- a/include/qemu/typedefs.h
+++ b/include/qemu/typedefs.h
@@ -120,6 +120,7 @@ typedef struct ReservedRegion ReservedRegion;
typedef struct SavedIOTLB SavedIOTLB;
typedef struct SHPCDevice SHPCDevice;
typedef struct SSIBus SSIBus;
+typedef struct TranslationBlock TranslationBlock;
typedef struct VirtIODevice VirtIODevice;
typedef struct Visitor Visitor;
typedef struct VMChangeStateEntry VMChangeStateEntry;
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 448982dd2f..7d26ce0c9d 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -172,8 +172,7 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu);
void arm_translate_init(void);
#ifdef CONFIG_TCG
-void arm_cpu_synchronize_from_tb(CPUState *cs,
- const struct TranslationBlock *tb);
+void arm_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
#endif /* CONFIG_TCG */
diff --git a/target/cris/translate.c b/target/cris/translate.c
index c893f877ab..65c168c0c7 100644
--- a/target/cris/translate.c
+++ b/target/cris/translate.c
@@ -132,7 +132,7 @@ typedef struct DisasContext {
int delayed_branch;
- struct TranslationBlock *tb;
+ TranslationBlock *tb;
int singlestep_enabled;
} DisasContext;
diff --git a/target/lm32/translate.c b/target/lm32/translate.c
index 030b232d66..20c70d03f1 100644
--- a/target/lm32/translate.c
+++ b/target/lm32/translate.c
@@ -93,7 +93,7 @@ typedef struct DisasContext {
unsigned int tb_flags, synced_flags; /* tb dependent flags. */
int is_jmp;
- struct TranslationBlock *tb;
+ TranslationBlock *tb;
int singlestep_enabled;
uint32_t features;
diff --git a/target/moxie/translate.c b/target/moxie/translate.c
index d5fb27dfb8..24a742b25e 100644
--- a/target/moxie/translate.c
+++ b/target/moxie/translate.c
@@ -36,7 +36,7 @@
/* This is the state at translation time. */
typedef struct DisasContext {
- struct TranslationBlock *tb;
+ TranslationBlock *tb;
target_ulong pc, saved_pc;
uint32_t opcode;
uint32_t fp_status;
diff --git a/target/unicore32/translate.c b/target/unicore32/translate.c
index 962f9877a0..370709c9ea 100644
--- a/target/unicore32/translate.c
+++ b/target/unicore32/translate.c
@@ -34,7 +34,7 @@ typedef struct DisasContext {
int condjmp;
/* The label that will be jumped to when the instruction is skipped. */
TCGLabel *condlabel;
- struct TranslationBlock *tb;
+ TranslationBlock *tb;
int singlestep_enabled;
#ifndef CONFIG_USER_ONLY
int user;
--
2.20.1
next prev parent reply other threads:[~2021-02-10 22:37 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-10 22:10 [PATCH v2 00/21] plugins/next pre-PR (hwprofile, regression fixes, icount count fix) Alex Bennée
2021-02-10 22:10 ` [PATCH v2 01/21] hw/virtio/pci: include vdev name in registered PCI sections Alex Bennée
2021-02-10 22:10 ` [PATCH v2 02/21] plugins: add API to return a name for a IO device Alex Bennée
2021-02-10 22:10 ` [PATCH v2 03/21] plugins: new hwprofile plugin Alex Bennée
2021-02-10 22:10 ` [PATCH v2 04/21] contrib: Don't use '#' flag of printf format Alex Bennée
2021-02-10 22:10 ` [PATCH v2 05/21] contrib: Fix some code style problems, ERROR: "foo * bar" should be "foo *bar" Alex Bennée
2021-02-10 22:10 ` [PATCH v2 06/21] contrib: Add spaces around operator Alex Bennée
2021-02-10 22:10 ` [PATCH v2 07/21] contrib: space required after that ',' Alex Bennée
2021-02-10 22:10 ` [PATCH v2 08/21] contrib: Open brace '{' following struct go on the same line Alex Bennée
2021-02-10 22:10 ` [PATCH v2 09/21] accel/tcg/plugin-gen: fix the call signature for inline callbacks Alex Bennée
2021-02-10 22:10 ` Alex Bennée [this message]
2021-02-11 10:14 ` [PATCH v2 10/21] exec: Move TranslationBlock typedef to qemu/typedefs.h Philippe Mathieu-Daudé
2021-02-11 10:24 ` Alex Bennée
2021-02-10 22:10 ` [PATCH v2 11/21] accel/tcg: Create io_recompile_replay_branch hook Alex Bennée
2021-02-11 10:12 ` Philippe Mathieu-Daudé
2021-02-10 22:10 ` [PATCH v2 12/21] target/mips: Create mips_io_recompile_replay_branch Alex Bennée
2021-02-11 10:10 ` Philippe Mathieu-Daudé
2021-02-10 22:10 ` [PATCH v2 13/21] target/sh4: Create superh_io_recompile_replay_branch Alex Bennée
2021-02-11 10:13 ` Philippe Mathieu-Daudé
2021-02-10 22:10 ` [PATCH v2 14/21] tests/plugin: expand insn test to detect duplicate instructions Alex Bennée
2021-02-10 22:10 ` [PATCH v2 15/21] tests/acceptance: add a new set of tests to exercise plugins Alex Bennée
2021-02-11 10:31 ` Philippe Mathieu-Daudé
2021-02-11 18:59 ` Wainer dos Santos Moschetta
2021-02-11 19:51 ` Wainer dos Santos Moschetta
2021-02-10 22:10 ` [PATCH v2 16/21] accel/tcg: actually cache our partial icount TB Alex Bennée
2021-02-11 10:21 ` Philippe Mathieu-Daudé
2021-02-11 18:48 ` Richard Henderson
2021-02-12 15:40 ` Philippe Mathieu-Daudé
2021-02-12 17:06 ` Alex Bennée
2021-02-11 18:48 ` Richard Henderson
2021-02-10 22:10 ` [PATCH v2 17/21] accel/tcg: cache single instruction TB on pending replay exception Alex Bennée
2021-02-11 19:12 ` Richard Henderson
2021-02-11 20:00 ` Alex Bennée
2021-02-10 22:10 ` [PATCH v2 18/21] accel/tcg: re-factor non-RAM execution code Alex Bennée
2021-02-11 19:19 ` Richard Henderson
2021-02-10 22:10 ` [PATCH v2 19/21] accel/tcg: remove CF_NOCACHE and special cases Alex Bennée
2021-02-10 22:10 ` [PATCH v2 20/21] accel/tcg: allow plugin instrumentation to be disable via cflags Alex Bennée
2021-02-12 0:53 ` Aaron Lindsay via
2021-02-12 11:22 ` Alex Bennée
2021-02-12 14:31 ` Aaron Lindsay via
2021-02-12 14:59 ` Alex Bennée
2021-02-12 14:43 ` Alex Bennée
2021-02-12 15:41 ` Aaron Lindsay via
2021-02-12 16:04 ` Alex Bennée
2021-02-12 16:50 ` Aaron Lindsay via
2021-02-12 17:19 ` Alex Bennée
2021-02-16 10:34 ` Alex Bennée
2021-02-17 16:32 ` Aaron Lindsay via
2021-02-12 16:00 ` Alex Bennée
2021-02-12 17:04 ` Aaron Lindsay via
2021-02-10 22:10 ` [PATCH v2 21/21] tests/acceptance: add a new tests to detect counting errors Alex Bennée
2021-02-11 10:24 ` Philippe Mathieu-Daudé
2021-02-11 19:56 ` Wainer dos Santos Moschetta
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