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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Taylor Simpson <tsimpson@quicinc.com>
Subject: [PULL 17/35] Hexagon (target/hexagon/conv_emu.[ch]) utility functions
Date: Wed, 17 Feb 2021 15:40:05 -0800	[thread overview]
Message-ID: <20210217234023.1742406-18-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210217234023.1742406-1-richard.henderson@linaro.org>

From: Taylor Simpson <tsimpson@quicinc.com>

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <1612763186-18161-17-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/hexagon/conv_emu.h |  31 +++++++
 target/hexagon/conv_emu.c | 177 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 208 insertions(+)
 create mode 100644 target/hexagon/conv_emu.h
 create mode 100644 target/hexagon/conv_emu.c

diff --git a/target/hexagon/conv_emu.h b/target/hexagon/conv_emu.h
new file mode 100644
index 0000000000..cade9de91f
--- /dev/null
+++ b/target/hexagon/conv_emu.h
@@ -0,0 +1,31 @@
+/*
+ *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_CONV_EMU_H
+#define HEXAGON_CONV_EMU_H
+
+uint64_t conv_sf_to_8u(float32 in, float_status *fp_status);
+uint32_t conv_sf_to_4u(float32 in, float_status *fp_status);
+int64_t conv_sf_to_8s(float32 in, float_status *fp_status);
+int32_t conv_sf_to_4s(float32 in, float_status *fp_status);
+
+uint64_t conv_df_to_8u(float64 in, float_status *fp_status);
+uint32_t conv_df_to_4u(float64 in, float_status *fp_status);
+int64_t conv_df_to_8s(float64 in, float_status *fp_status);
+int32_t conv_df_to_4s(float64 in, float_status *fp_status);
+
+#endif
diff --git a/target/hexagon/conv_emu.c b/target/hexagon/conv_emu.c
new file mode 100644
index 0000000000..3985b1032a
--- /dev/null
+++ b/target/hexagon/conv_emu.c
@@ -0,0 +1,177 @@
+/*
+ *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/host-utils.h"
+#include "fpu/softfloat.h"
+#include "macros.h"
+#include "conv_emu.h"
+
+#define LL_MAX_POS 0x7fffffffffffffffULL
+#define MAX_POS 0x7fffffffU
+
+static uint64_t conv_f64_to_8u_n(float64 in, int will_negate,
+                                 float_status *fp_status)
+{
+    uint8_t sign = float64_is_neg(in);
+    if (float64_is_infinity(in)) {
+        float_raise(float_flag_invalid, fp_status);
+        if (float64_is_neg(in)) {
+            return 0ULL;
+        } else {
+            return ~0ULL;
+        }
+    }
+    if (float64_is_any_nan(in)) {
+        float_raise(float_flag_invalid, fp_status);
+        return ~0ULL;
+    }
+    if (float64_is_zero(in)) {
+        return 0;
+    }
+    if (sign) {
+        float_raise(float_flag_invalid, fp_status);
+        return 0;
+    }
+    if (float64_lt(in, float64_half, fp_status)) {
+        /* Near zero, captures large fracshifts, denorms, etc */
+        float_raise(float_flag_inexact, fp_status);
+        switch (get_float_rounding_mode(fp_status)) {
+        case float_round_down:
+            if (will_negate) {
+                return 1;
+            } else {
+                return 0;
+            }
+        case float_round_up:
+            if (!will_negate) {
+                return 1;
+            } else {
+                return 0;
+            }
+        default:
+            return 0;    /* nearest or towards zero */
+        }
+    }
+    return float64_to_uint64(in, fp_status);
+}
+
+static void clr_float_exception_flags(uint8_t flag, float_status *fp_status)
+{
+    uint8_t flags = fp_status->float_exception_flags;
+    flags &= ~flag;
+    set_float_exception_flags(flags, fp_status);
+}
+
+static uint32_t conv_df_to_4u_n(float64 fp64, int will_negate,
+                                float_status *fp_status)
+{
+    uint64_t tmp;
+    tmp = conv_f64_to_8u_n(fp64, will_negate, fp_status);
+    if (tmp > 0x00000000ffffffffULL) {
+        clr_float_exception_flags(float_flag_inexact, fp_status);
+        float_raise(float_flag_invalid, fp_status);
+        return ~0U;
+    }
+    return (uint32_t)tmp;
+}
+
+uint64_t conv_df_to_8u(float64 in, float_status *fp_status)
+{
+    return conv_f64_to_8u_n(in, 0, fp_status);
+}
+
+uint32_t conv_df_to_4u(float64 in, float_status *fp_status)
+{
+    return conv_df_to_4u_n(in, 0, fp_status);
+}
+
+int64_t conv_df_to_8s(float64 in, float_status *fp_status)
+{
+    uint8_t sign = float64_is_neg(in);
+    uint64_t tmp;
+    if (float64_is_any_nan(in)) {
+        float_raise(float_flag_invalid, fp_status);
+        return -1;
+    }
+    if (sign) {
+        float64 minus_fp64 = float64_abs(in);
+        tmp = conv_f64_to_8u_n(minus_fp64, 1, fp_status);
+    } else {
+        tmp = conv_f64_to_8u_n(in, 0, fp_status);
+    }
+    if (tmp > (LL_MAX_POS + sign)) {
+        clr_float_exception_flags(float_flag_inexact, fp_status);
+        float_raise(float_flag_invalid, fp_status);
+        tmp = (LL_MAX_POS + sign);
+    }
+    if (sign) {
+        return -tmp;
+    } else {
+        return tmp;
+    }
+}
+
+int32_t conv_df_to_4s(float64 in, float_status *fp_status)
+{
+    uint8_t sign = float64_is_neg(in);
+    uint64_t tmp;
+    if (float64_is_any_nan(in)) {
+        float_raise(float_flag_invalid, fp_status);
+        return -1;
+    }
+    if (sign) {
+        float64 minus_fp64 = float64_abs(in);
+        tmp = conv_f64_to_8u_n(minus_fp64, 1, fp_status);
+    } else {
+        tmp = conv_f64_to_8u_n(in, 0, fp_status);
+    }
+    if (tmp > (MAX_POS + sign)) {
+        clr_float_exception_flags(float_flag_inexact, fp_status);
+        float_raise(float_flag_invalid, fp_status);
+        tmp = (MAX_POS + sign);
+    }
+    if (sign) {
+        return -tmp;
+    } else {
+        return tmp;
+    }
+}
+
+uint64_t conv_sf_to_8u(float32 in, float_status *fp_status)
+{
+    float64 fp64 = float32_to_float64(in, fp_status);
+    return conv_df_to_8u(fp64, fp_status);
+}
+
+uint32_t conv_sf_to_4u(float32 in, float_status *fp_status)
+{
+    float64 fp64 = float32_to_float64(in, fp_status);
+    return conv_df_to_4u(fp64, fp_status);
+}
+
+int64_t conv_sf_to_8s(float32 in, float_status *fp_status)
+{
+    float64 fp64 = float32_to_float64(in, fp_status);
+    return conv_df_to_8s(fp64, fp_status);
+}
+
+int32_t conv_sf_to_4s(float32 in, float_status *fp_status)
+{
+    float64 fp64 = float32_to_float64(in, fp_status);
+    return conv_df_to_4s(fp64, fp_status);
+}
-- 
2.25.1



  parent reply	other threads:[~2021-02-17 23:51 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-17 23:39 [PULL 00/35] hexagon initial commit Richard Henderson
2021-02-17 23:39 ` [PULL 01/35] qemu/int128: Add int128_or Richard Henderson
2021-02-17 23:39 ` [PULL 02/35] Hexagon Update MAINTAINERS file Richard Henderson
2021-02-17 23:39 ` [PULL 03/35] Hexagon (target/hexagon) README Richard Henderson
2021-02-17 23:39 ` [PULL 04/35] Hexagon (include/elf.h) ELF machine definition Richard Henderson
2021-02-17 23:39 ` [PULL 05/35] Hexagon (target/hexagon) scalar core definition Richard Henderson
2021-02-17 23:39 ` [PULL 06/35] Hexagon (disas) disassembler Richard Henderson
2021-08-09 11:12   ` Peter Maydell
2021-02-17 23:39 ` [PULL 07/35] Hexagon (target/hexagon) register names Richard Henderson
2021-02-17 23:39 ` [PULL 08/35] Hexagon (target/hexagon) scalar core helpers Richard Henderson
2021-02-17 23:39 ` [PULL 09/35] Hexagon (target/hexagon) GDB Stub Richard Henderson
2021-02-17 23:39 ` [PULL 10/35] Hexagon (target/hexagon) architecture types Richard Henderson
2021-02-17 23:39 ` [PULL 11/35] Hexagon (target/hexagon) instruction and packet types Richard Henderson
2021-02-17 23:40 ` [PULL 12/35] Hexagon (target/hexagon) register fields Richard Henderson
2021-02-17 23:40 ` [PULL 13/35] Hexagon (target/hexagon) instruction attributes Richard Henderson
2021-02-17 23:40 ` [PULL 14/35] Hexagon (target/hexagon) instruction/packet decode Richard Henderson
2021-02-17 23:40 ` [PULL 15/35] Hexagon (target/hexagon) instruction printing Richard Henderson
2021-02-17 23:40 ` [PULL 16/35] Hexagon (target/hexagon/arch.[ch]) utility functions Richard Henderson
2021-02-17 23:40 ` Richard Henderson [this message]
2021-02-17 23:40 ` [PULL 18/35] Hexagon (target/hexagon/fma_emu.[ch]) " Richard Henderson
2021-02-17 23:40 ` [PULL 19/35] Hexagon (target/hexagon/imported) arch import Richard Henderson
2021-02-17 23:40 ` [PULL 20/35] Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics Richard Henderson
2021-02-17 23:40 ` [PULL 21/35] Hexagon (target/hexagon) generator phase 2 - generate header files Richard Henderson
2021-02-17 23:40 ` [PULL 22/35] Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree Richard Henderson
2021-02-17 23:40 ` [PULL 23/35] Hexagon (target/hexagon) generater phase 4 - " Richard Henderson
2021-02-17 23:40 ` [PULL 24/35] Hexagon (target/hexagon) opcode data structures Richard Henderson
2021-02-17 23:40 ` [PULL 25/35] Hexagon (target/hexagon) macros Richard Henderson
2021-02-17 23:40 ` [PULL 26/35] Hexagon (target/hexagon) instruction classes Richard Henderson
2021-02-17 23:40 ` [PULL 27/35] Hexagon (target/hexagon) TCG generation Richard Henderson
2021-02-17 23:40 ` [PULL 28/35] Hexagon (target/hexagon) TCG for instructions with multiple definitions Richard Henderson
2021-02-17 23:40 ` [PULL 29/35] Hexagon (target/hexagon) TCG for floating point instructions Richard Henderson
2021-02-17 23:40 ` [PULL 30/35] Hexagon (target/hexagon) translation Richard Henderson
2021-02-17 23:40 ` [PULL 31/35] Hexagon (linux-user/hexagon) Linux user emulation Richard Henderson
2021-02-17 23:40 ` [PULL 32/35] Hexagon (tests/tcg/hexagon) TCG tests - multiarch Richard Henderson
2021-02-17 23:40 ` [PULL 33/35] Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc Richard Henderson
2021-02-17 23:40 ` [PULL 34/35] Hexagon (tests/tcg/hexagon) TCG tests - floating point Richard Henderson
2021-02-17 23:40 ` [PULL 35/35] Hexagon build infrastructure Richard Henderson
2021-02-18  0:19 ` [PULL 00/35] hexagon initial commit no-reply
2021-02-18 11:20 ` Peter Maydell

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