From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 05/44] hw/arm/armsse: Introduce SSE subsystem version property
Date: Fri, 19 Feb 2021 14:45:38 +0000 [thread overview]
Message-ID: <20210219144617.4782-6-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210219144617.4782-1-peter.maydell@linaro.org>
We model Arm "Subsystems for Embedded" SoC subsystems using generic
code which is split into various sub-devices which are configurable
by QOM properties to handle the behaviour differences between the SSE
subsystems we implement. Currently the only sub-device which needs
to change is the IOTKIT_SYSCTL device, and we do this with a mix of
properties that directly specify divergent behaviours (eg
CPUWAIT_RST) and passing it the SYS_VERSION register value as a way
for it to distinguish IoTKit from SSE-200.
The "pass SYS_VERSION" approach is already a bit hacky, since the
IOTKIT_SYSCTL device has to know that the different part of the
register value happens to be bits [31:28]. For SSE-300 this register
is renamed SOC_IDENTITY and has a different format entirely, all of
whose fields can be configured by the SoC integrator when they
integrate the SSE into their SoC, and so "pass SYS_VERSION" breaks
down completely.
Switch to using a simple integer property representing an
internal-to-QEMU enumeration of the SSE flavour. For the moment we
only need this in IOTKIT_SYSCTL, but as we add SSE-300 support a few
of the other devices will also need to know.
We define and permit a value for the SSE-300 so we can start using
it in subsequent commits which add SSE-300 support.
The now-redundant is_sse200 flag in IoTKitSysCtl will be removed
in the following commit.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
I didn't use a full-on qdev/QOM 'enum' property here because that
requires messing with the QAPI schema, which seems like overkill for
this entirely-internal-to-the-implementation bit of information
passing.
---
include/hw/arm/armsse-version.h | 42 +++++++++++++++++++++++++++++++++
include/hw/misc/iotkit-sysctl.h | 7 +++---
hw/arm/armsse.c | 8 +++++--
hw/misc/iotkit-sysctl.c | 11 +++++----
4 files changed, 58 insertions(+), 10 deletions(-)
create mode 100644 include/hw/arm/armsse-version.h
diff --git a/include/hw/arm/armsse-version.h b/include/hw/arm/armsse-version.h
new file mode 100644
index 00000000000..60780fa9843
--- /dev/null
+++ b/include/hw/arm/armsse-version.h
@@ -0,0 +1,42 @@
+/*
+ * ARM SSE (Subsystems for Embedded): IoTKit, SSE-200
+ *
+ * Copyright (c) 2020 Linaro Limited
+ * Written by Peter Maydell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 or
+ * (at your option) any later version.
+ */
+
+#ifndef ARMSSE_VERSION_H
+#define ARMSSE_VERSION_H
+
+
+/*
+ * Define an enumeration of the possible values of the sse-version
+ * property implemented by various sub-devices of the SSE, and
+ * a validation function that checks that a valid value has been passed.
+ * These are arbitrary QEMU-internal values (nobody should be creating
+ * the sub-devices of the SSE except for the SSE object itself), but
+ * we pick obvious numbers for the benefit of people debugging with gdb.
+ */
+enum {
+ ARMSSE_IOTKIT = 0,
+ ARMSSE_SSE200 = 200,
+ ARMSSE_SSE300 = 300,
+};
+
+static inline bool armsse_version_valid(uint32_t sse_version)
+{
+ switch (sse_version) {
+ case ARMSSE_IOTKIT:
+ case ARMSSE_SSE200:
+ case ARMSSE_SSE300:
+ return true;
+ default:
+ return false;
+ }
+}
+
+#endif
diff --git a/include/hw/misc/iotkit-sysctl.h b/include/hw/misc/iotkit-sysctl.h
index 2bc391138db..7cdafea3e25 100644
--- a/include/hw/misc/iotkit-sysctl.h
+++ b/include/hw/misc/iotkit-sysctl.h
@@ -17,9 +17,8 @@
* "system control register" blocks.
*
* QEMU interface:
- * + QOM property "SYS_VERSION": value of the SYS_VERSION register of the
- * system information block of the SSE
- * (used to identify whether to provide SSE-200-only registers)
+ * + QOM property "sse-version": indicates which SSE version this is part of
+ * (used to identify whether to provide SSE-200-only registers, etc)
* + sysbus MMIO region 0: the system information register bank
* + sysbus MMIO region 1: the system control register bank
*/
@@ -61,7 +60,7 @@ struct IoTKitSysCtl {
uint32_t pdcm_pd_sram3_sense;
/* Properties */
- uint32_t sys_version;
+ uint32_t sse_version;
uint32_t cpuwait_rst;
uint32_t initsvtor0_rst;
uint32_t initsvtor1_rst;
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index fa155b72022..f509f59d4a8 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -19,6 +19,7 @@
#include "migration/vmstate.h"
#include "hw/registerfields.h"
#include "hw/arm/armsse.h"
+#include "hw/arm/armsse-version.h"
#include "hw/arm/boot.h"
#include "hw/irq.h"
#include "hw/qdev-clock.h"
@@ -31,6 +32,7 @@ typedef enum SysConfigFormat {
struct ARMSSEInfo {
const char *name;
+ uint32_t sse_version;
int sram_banks;
int num_cpus;
uint32_t sys_version;
@@ -71,6 +73,7 @@ static Property armsse_properties[] = {
static const ARMSSEInfo armsse_variants[] = {
{
.name = TYPE_IOTKIT,
+ .sse_version = ARMSSE_IOTKIT,
.sram_banks = 1,
.num_cpus = 1,
.sys_version = 0x41743,
@@ -85,6 +88,7 @@ static const ARMSSEInfo armsse_variants[] = {
},
{
.name = TYPE_SSE200,
+ .sse_version = ARMSSE_SSE200,
.sram_banks = 4,
.num_cpus = 2,
.sys_version = 0x22041743,
@@ -951,8 +955,8 @@ static void armsse_realize(DeviceState *dev, Error **errp)
/* System information registers */
sysbus_mmio_map(SYS_BUS_DEVICE(&s->sysinfo), 0, 0x40020000);
/* System control registers */
- object_property_set_int(OBJECT(&s->sysctl), "SYS_VERSION",
- info->sys_version, &error_abort);
+ object_property_set_int(OBJECT(&s->sysctl), "sse-version",
+ info->sse_version, &error_abort);
object_property_set_int(OBJECT(&s->sysctl), "CPUWAIT_RST",
info->cpuwait_rst, &error_abort);
object_property_set_int(OBJECT(&s->sysctl), "INITSVTOR0_RST",
diff --git a/hw/misc/iotkit-sysctl.c b/hw/misc/iotkit-sysctl.c
index 222511c4b04..34b37fe8824 100644
--- a/hw/misc/iotkit-sysctl.c
+++ b/hw/misc/iotkit-sysctl.c
@@ -28,6 +28,7 @@
#include "hw/registerfields.h"
#include "hw/misc/iotkit-sysctl.h"
#include "hw/qdev-properties.h"
+#include "hw/arm/armsse-version.h"
#include "target/arm/arm-powerctl.h"
#include "target/arm/cpu.h"
@@ -438,10 +439,12 @@ static void iotkit_sysctl_realize(DeviceState *dev, Error **errp)
{
IoTKitSysCtl *s = IOTKIT_SYSCTL(dev);
- /* The top 4 bits of the SYS_VERSION register tell us if we're an SSE-200 */
- if (extract32(s->sys_version, 28, 4) == 2) {
- s->is_sse200 = true;
+ if (!armsse_version_valid(s->sse_version)) {
+ error_setg(errp, "invalid sse-version value %d", s->sse_version);
+ return;
}
+
+ s->is_sse200 = s->sse_version == ARMSSE_SSE200;
}
static bool sse200_needed(void *opaque)
@@ -493,7 +496,7 @@ static const VMStateDescription iotkit_sysctl_vmstate = {
};
static Property iotkit_sysctl_props[] = {
- DEFINE_PROP_UINT32("SYS_VERSION", IoTKitSysCtl, sys_version, 0),
+ DEFINE_PROP_UINT32("sse-version", IoTKitSysCtl, sse_version, 0),
DEFINE_PROP_UINT32("CPUWAIT_RST", IoTKitSysCtl, cpuwait_rst, 0),
DEFINE_PROP_UINT32("INITSVTOR0_RST", IoTKitSysCtl, initsvtor0_rst,
0x10000000),
--
2.20.1
next prev parent reply other threads:[~2021-02-19 14:58 UTC|newest]
Thread overview: 103+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-19 14:45 [PATCH 00/44] hw/arm: New board model mps3-an547 Peter Maydell
2021-02-19 14:45 ` [PATCH 01/44] clock: Add ClockEvent parameter to callbacks Peter Maydell
2021-03-04 2:50 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 02/44] clock: Add ClockPreUpdate callback event type Peter Maydell
2021-02-19 14:45 ` [PATCH 03/44] clock: Add clock_ns_to_ticks() function Peter Maydell
2021-02-19 14:45 ` [PATCH 04/44] hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks() Peter Maydell
2021-02-19 14:45 ` Peter Maydell [this message]
2021-03-04 17:10 ` [PATCH 05/44] hw/arm/armsse: Introduce SSE subsystem version property Richard Henderson
2021-02-19 14:45 ` [PATCH 06/44] hw/misc/iotkit-sysctl: Remove is_sse200 flag Peter Maydell
2021-03-04 17:13 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 07/44] hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values Peter Maydell
2021-03-04 17:29 ` Richard Henderson
2021-03-04 17:51 ` Richard Henderson
2021-03-04 19:28 ` Peter Maydell
2021-02-19 14:45 ` [PATCH 08/44] hw/misc/iotkit-sysinfo.c: " Peter Maydell
2021-03-04 17:35 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 09/44] hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300 Peter Maydell
2021-03-04 17:39 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 10/44] hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR Peter Maydell
2021-03-04 17:54 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 11/44] hw/timer/sse-counter: Model the SSE Subsystem System Counter Peter Maydell
2021-03-04 18:38 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 12/44] hw/timer/sse-timer: Model the SSE Subsystem System Timer Peter Maydell
2021-03-04 19:11 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 13/44] hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour Peter Maydell
2021-03-04 19:13 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 14/44] hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300 Peter Maydell
2021-03-04 19:34 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 15/44] hw/misc/iotkit-sysctl: Handle INITSVTOR* " Peter Maydell
2021-03-04 19:38 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 16/44] hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL register Peter Maydell
2021-03-04 19:49 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 17/44] hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers Peter Maydell
2021-03-04 19:52 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 18/44] hw/misc/iotkit-sysctl: Implement SSE-200 and SSE-300 PID register values Peter Maydell
2021-03-04 19:57 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 19/44] hw/arm/Kconfig: Move ARMSSE_CPUID and ARMSSE_MHU stanzas to hw/misc Peter Maydell
2021-02-21 13:31 ` Philippe Mathieu-Daudé
2021-03-04 19:57 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 20/44] hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block Peter Maydell
2021-03-04 20:02 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 21/44] hw/arm/armsse: Use an array for apb_ppc fields in the state structure Peter Maydell
2021-02-21 13:34 ` Philippe Mathieu-Daudé
2021-03-04 20:04 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 22/44] hw/arm/armsse: Add a define for number of IRQs used by the SSE itself Peter Maydell
2021-02-21 13:34 ` Philippe Mathieu-Daudé
2021-03-04 20:04 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 23/44] hw/arm/armsse: Add framework for data-driven device placement Peter Maydell
2021-03-04 20:10 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 24/44] hw/arm/armsse: Move dual-timer device into data-driven framework Peter Maydell
2021-03-04 20:12 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 25/44] hw/arm/armsse: Move watchdogs " Peter Maydell
2021-03-04 20:15 ` Richard Henderson
2021-02-19 14:45 ` [PATCH 26/44] hw/arm/armsse: Move s32ktimer " Peter Maydell
2021-03-04 20:16 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 27/44] hw/arm/armsse: Move sysinfo register block " Peter Maydell
2021-03-04 20:19 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 28/44] hw/arm/armsse: Move sysctl " Peter Maydell
2021-03-04 20:21 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 29/44] hw/arm/armsse: Move PPUs " Peter Maydell
2021-03-04 20:24 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 30/44] hw/arm/armsse: Add missing SSE-200 SYS_PPU Peter Maydell
2021-03-04 20:25 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 31/44] hw/arm/armsse: Indirect irq_is_common[] through ARMSSEInfo Peter Maydell
2021-03-04 20:19 ` Philippe Mathieu-Daudé
2021-03-05 10:50 ` Philippe Mathieu-Daudé
2021-03-04 20:26 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 32/44] hw/arm/armsse: Add support for SSE variants with a system counter Peter Maydell
2021-03-04 20:30 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 33/44] hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfo Peter Maydell
2021-03-04 20:22 ` Philippe Mathieu-Daudé
2021-03-04 20:34 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 34/44] hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block Peter Maydell
2021-03-04 20:37 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 35/44] hw/arm/armsse: Add SSE-300 support Peter Maydell
2021-03-04 20:39 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 36/44] hw/arm/mps2-tz: Make UART overflow IRQ board-specific Peter Maydell
2021-03-04 20:16 ` Philippe Mathieu-Daudé
2021-03-04 20:43 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 37/44] hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate Peter Maydell
2021-03-04 20:45 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 38/44] hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register Peter Maydell
2021-03-04 20:24 ` Philippe Mathieu-Daudé
2021-03-04 20:50 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 39/44] hw/misc/mps2-scc: Implement changes for AN547 Peter Maydell
2021-03-05 0:30 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 40/44] hw/arm/mps2-tz: Support running APB peripherals on different clock Peter Maydell
2021-03-04 20:27 ` Philippe Mathieu-Daudé
2021-03-05 1:01 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 41/44] hw/arm/mps2-tz: Make initsvtor0 setting board-specific Peter Maydell
2021-03-04 20:17 ` Philippe Mathieu-Daudé
2021-03-05 1:05 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 42/44] hw/arm/mps2-tz: Add new mps3-an547 board Peter Maydell
2021-03-05 1:19 ` Richard Henderson
2021-02-19 14:46 ` [PATCH 43/44] docs/system/arm/mps2.rst: Document the " Peter Maydell
2021-03-04 20:28 ` Philippe Mathieu-Daudé
2021-03-05 1:28 ` Richard Henderson
2021-03-05 10:22 ` Peter Maydell
2021-03-08 17:35 ` Peter Maydell
2021-02-19 14:46 ` [PATCH 44/44] tests/qtest/sse-timer-test: Add simple tests of the SSE timer and counter Peter Maydell
2021-03-05 11:08 ` Philippe Mathieu-Daudé
2021-02-19 15:43 ` [PATCH 00/44] hw/arm: New board model mps3-an547 no-reply
2021-03-05 11:56 ` Philippe Mathieu-Daudé
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