From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Paul Burton" <paulburton@kernel.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
"Cleber Rosa" <crosa@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PULL 09/43] target/mips: Remove access_type argument from map_address() handler
Date: Sun, 21 Feb 2021 15:33:58 +0100 [thread overview]
Message-ID: <20210221143432.2468220-10-f4bug@amsat.org> (raw)
In-Reply-To: <20210221143432.2468220-1-f4bug@amsat.org>
TLB map_address() handlers don't use the 'access_type' argument,
remove it to simplify.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20210128144125.3696119-2-f4bug@amsat.org>
---
target/mips/internal.h | 8 ++++----
target/mips/tlb_helper.c | 15 +++++++--------
2 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/target/mips/internal.h b/target/mips/internal.h
index 5dd17ff7333..d09afded5ea 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -111,7 +111,7 @@ struct CPUMIPSTLBContext {
uint32_t nb_tlb;
uint32_t tlb_in_use;
int (*map_address)(struct CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, int rw, int access_type);
+ target_ulong address, int rw);
void (*helper_tlbwi)(struct CPUMIPSState *env);
void (*helper_tlbwr)(struct CPUMIPSState *env);
void (*helper_tlbp)(struct CPUMIPSState *env);
@@ -126,11 +126,11 @@ struct CPUMIPSTLBContext {
};
int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, int rw, int access_type);
+ target_ulong address, int rw);
int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, int rw, int access_type);
+ target_ulong address, int rw);
int r4k_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, int rw, int access_type);
+ target_ulong address, int rw);
void r4k_helper_tlbwi(CPUMIPSState *env);
void r4k_helper_tlbwr(CPUMIPSState *env);
void r4k_helper_tlbp(CPUMIPSState *env);
diff --git a/target/mips/tlb_helper.c b/target/mips/tlb_helper.c
index 082c17928d3..1af2dc969d6 100644
--- a/target/mips/tlb_helper.c
+++ b/target/mips/tlb_helper.c
@@ -39,7 +39,7 @@ enum {
/* no MMU emulation */
int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, int rw, int access_type)
+ target_ulong address, int rw)
{
*physical = address;
*prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
@@ -48,7 +48,7 @@ int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
/* fixed mapping MMU emulation */
int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, int rw, int access_type)
+ target_ulong address, int rw)
{
if (address <= (int32_t)0x7FFFFFFFUL) {
if (!(env->CP0_Status & (1 << CP0St_ERL))) {
@@ -68,7 +68,7 @@ int fixed_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
/* MIPS32/MIPS64 R4000-style MMU emulation */
int r4k_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
- target_ulong address, int rw, int access_type)
+ target_ulong address, int rw)
{
uint16_t ASID = env->CP0_EntryHi & env->CP0_EntryHi_ASID_mask;
uint32_t MMID = env->CP0_MemoryMapID;
@@ -234,8 +234,7 @@ static int get_seg_physical_address(CPUMIPSState *env, hwaddr *physical,
return mapped;
} else if (mapped) {
/* The segment is TLB mapped */
- return env->tlb->map_address(env, physical, prot, real_address, rw,
- access_type);
+ return env->tlb->map_address(env, physical, prot, real_address, rw);
} else {
/* The segment is unmapped */
*physical = physical_base | (real_address & segmask);
@@ -314,7 +313,7 @@ static int get_physical_address(CPUMIPSState *env, hwaddr *physical,
/* xuseg */
if (UX && address <= (0x3FFFFFFFFFFFFFFFULL & env->SEGMask)) {
ret = env->tlb->map_address(env, physical, prot,
- real_address, rw, access_type);
+ real_address, rw);
} else {
ret = TLBRET_BADADDR;
}
@@ -323,7 +322,7 @@ static int get_physical_address(CPUMIPSState *env, hwaddr *physical,
if ((supervisor_mode || kernel_mode) &&
SX && address <= (0x7FFFFFFFFFFFFFFFULL & env->SEGMask)) {
ret = env->tlb->map_address(env, physical, prot,
- real_address, rw, access_type);
+ real_address, rw);
} else {
ret = TLBRET_BADADDR;
}
@@ -364,7 +363,7 @@ static int get_physical_address(CPUMIPSState *env, hwaddr *physical,
if (kernel_mode && KX &&
address <= (0xFFFFFFFF7FFFFFFFULL & env->SEGMask)) {
ret = env->tlb->map_address(env, physical, prot,
- real_address, rw, access_type);
+ real_address, rw);
} else {
ret = TLBRET_BADADDR;
}
--
2.26.2
next prev parent reply other threads:[~2021-02-21 14:47 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-21 14:33 [PULL 00/43] MIPS patches for 2021-02-21 Philippe Mathieu-Daudé
2021-02-21 14:33 ` [PULL 01/43] hw/mips: loongson3: Drop 'struct MemmapEntry' Philippe Mathieu-Daudé
2021-02-21 14:33 ` [PULL 02/43] hw/mips: Add a bootloader helper Philippe Mathieu-Daudé
2021-02-21 17:30 ` Philippe Mathieu-Daudé
2021-02-21 14:33 ` [PULL 03/43] hw/mips/fuloong2e: Use bl_gen_kernel_jump to generate bootloaders Philippe Mathieu-Daudé
2021-02-21 14:33 ` [PULL 04/43] hw/mips/boston: " Philippe Mathieu-Daudé
2021-02-21 14:33 ` [PULL 05/43] hw/mips/boston: Use bootloader helper to set GCRs Philippe Mathieu-Daudé
2021-02-21 14:33 ` [PULL 06/43] hw/intc/loongson_liointc: Fix per core ISR handling Philippe Mathieu-Daudé
2021-02-21 14:33 ` [PULL 07/43] tests/acceptance: Test PMON with Loongson-3A1000 CPU Philippe Mathieu-Daudé
2021-02-21 14:33 ` [PULL 08/43] target/mips: fetch code with translator_ld Philippe Mathieu-Daudé
2021-02-21 14:33 ` Philippe Mathieu-Daudé [this message]
2021-02-21 14:33 ` [PULL 10/43] target/mips: Remove access_type argument from get_seg_physical_address Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 11/43] target/mips: Remove access_type arg from get_segctl_physical_address() Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 12/43] target/mips: Remove access_type argument from get_physical_address() Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 13/43] target/mips: Remove unused MMU definitions Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 14/43] target/mips: Replace magic value by MMU_DATA_LOAD definition Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 15/43] target/mips: Let do_translate_address() take MMUAccessType argument Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 16/43] target/mips: Let cpu_mips_translate_address() take MMUAccessType arg Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 17/43] target/mips: Let raise_mmu_exception() take MMUAccessType argument Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 18/43] target/mips: Let get_physical_address() " Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 19/43] target/mips: Let get_seg*_physical_address() take MMUAccessType arg Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 20/43] target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 21/43] target/mips: Remove unused 'rw' argument from page_table_walk_refill() Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 22/43] target/mips: Include missing "tcg/tcg.h" header Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 23/43] target/mips: Make cpu_HI/LO registers public Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 24/43] target/mips: Promote 128-bit multimedia registers as global ones Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 25/43] target/mips: Rename 128-bit upper halve GPR registers Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 26/43] target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 27/43] target/mips: Use GPR move functions in gen_HILO1_tx79() Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 28/43] vt82c686: Move superio memory region to SuperIOConfig struct Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 29/43] vt82c686: Reorganise code Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 30/43] vt82c686: Fix SMBus IO base and configuration registers Philippe Mathieu-Daudé
2021-06-24 15:46 ` Philippe Mathieu-Daudé
2021-06-24 16:01 ` Philippe Mathieu-Daudé
2021-06-24 16:16 ` Philippe Mathieu-Daudé
2021-06-24 16:46 ` Philippe Mathieu-Daudé
2021-06-24 17:00 ` BALATON Zoltan
2021-06-24 17:29 ` Philippe Mathieu-Daudé
2021-06-24 18:01 ` BALATON Zoltan
2021-06-24 18:29 ` BALATON Zoltan
2021-06-24 19:29 ` Philippe Mathieu-Daudé
2021-06-24 18:38 ` Philippe Mathieu-Daudé
2021-06-24 17:18 ` Philippe Mathieu-Daudé
2021-06-24 16:22 ` BALATON Zoltan
2021-06-24 18:37 ` BALATON Zoltan
2021-02-21 14:34 ` [PULL 31/43] vt82c686: Make vt82c686-pm an I/O tracing region Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 32/43] vt82c686: Correct vt82c686-pm I/O size Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 33/43] vt82c686: Correctly reset all registers to default values on reset Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 34/43] vt82c686: Fix up power management io base and config Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 35/43] vt82c686: Set user_creatable=false for VT82C686B_PM Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 36/43] vt82c686: Make vt82c686b-pm an abstract base class and add vt8231-pm based on it Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 37/43] vt82c686: Simplify vt82c686b_realize() Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 38/43] vt82c686: Move creation of ISA devices to the ISA bridge Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 39/43] vt82c686: Remove index field of SuperIOConfig Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 40/43] vt82c686: Reduce indentation by returning early Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 41/43] vt82c686: Simplify by returning earlier Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 42/43] vt82c686: Log superio_cfg unimplemented accesses Philippe Mathieu-Daudé
2021-02-21 14:34 ` [PULL 43/43] vt82c686: Fix superio_cfg_{read,write}() functions Philippe Mathieu-Daudé
2021-02-21 17:34 ` [PULL 00/43] MIPS patches for 2021-02-21 Philippe Mathieu-Daudé
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