From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Eduardo Habkost" <ehabkost@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Laurent Vivier" <laurent@vivier.eu>,
"Markus Armbruster" <armbru@redhat.com>,
"Claudio Fontana" <cfontana@suse.de>,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: [PATCH v5 2/4] target/i386/cpu: Restrict x86_cpu_get_feature_words to sysemu
Date: Wed, 24 Feb 2021 23:46:41 +0100 [thread overview]
Message-ID: <20210224224643.3369940-3-philmd@redhat.com> (raw)
In-Reply-To: <20210224224643.3369940-1-philmd@redhat.com>
Only qemu-system-FOO and qemu-storage-daemon provide QMP
monitors, therefore such declarations and definitions are
irrelevant for user-mode emulation.
Restricting the x86-specific commands to machine-target.json
pulls less QAPI-generated code into user-mode.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
target/i386/cpu-internal.h | 3 +++
target/i386/cpu-softmmu.c | 36 ++++++++++++++++++++++++++++++++++
target/i386/cpu.c | 40 +++-----------------------------------
3 files changed, 42 insertions(+), 37 deletions(-)
diff --git a/target/i386/cpu-internal.h b/target/i386/cpu-internal.h
index 9df24c482ea..9355f86f6e1 100644
--- a/target/i386/cpu-internal.h
+++ b/target/i386/cpu-internal.h
@@ -69,6 +69,9 @@ void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v,
void x86_cpu_apic_create(X86CPU *cpu, Error **errp);
void x86_cpu_apic_realize(X86CPU *cpu, Error **errp);
void x86_cpu_machine_reset_cb(void *opaque);
+void x86_cpu_get_feature_words(Object *obj, Visitor *v,
+ const char *name, void *opaque,
+ Error **errp);
#endif /* CONFIG_USER_ONLY */
#endif /* CPU_INTERNAL_H */
diff --git a/target/i386/cpu-softmmu.c b/target/i386/cpu-softmmu.c
index c824408e8eb..34fd7b0de02 100644
--- a/target/i386/cpu-softmmu.c
+++ b/target/i386/cpu-softmmu.c
@@ -23,6 +23,7 @@
#include "sysemu/whpx.h"
#include "kvm/kvm_i386.h"
#include "qapi/error.h"
+#include "qapi/qapi-visit-machine.h"
#include "qapi/qapi-visit-run-state.h"
#include "qapi/qmp/qdict.h"
#include "qom/qom-qobject.h"
@@ -350,3 +351,38 @@ void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v,
qapi_free_GuestPanicInformation(panic_info);
}
+/* Generic getter for "feature-words" and "filtered-features" properties */
+void x86_cpu_get_feature_words(Object *obj, Visitor *v,
+ const char *name, void *opaque,
+ Error **errp)
+{
+ uint64_t *array = (uint64_t *)opaque;
+ FeatureWord w;
+ X86CPUFeatureWordInfo word_infos[FEATURE_WORDS] = { };
+ X86CPUFeatureWordInfoList list_entries[FEATURE_WORDS] = { };
+ X86CPUFeatureWordInfoList *list = NULL;
+
+ for (w = 0; w < FEATURE_WORDS; w++) {
+ FeatureWordInfo *wi = &feature_word_info[w];
+ /*
+ * We didn't have MSR features when "feature-words" was
+ * introduced. Therefore skipped other type entries.
+ */
+ if (wi->type != CPUID_FEATURE_WORD) {
+ continue;
+ }
+ X86CPUFeatureWordInfo *qwi = &word_infos[w];
+ qwi->cpuid_input_eax = wi->cpuid.eax;
+ qwi->has_cpuid_input_ecx = wi->cpuid.needs_ecx;
+ qwi->cpuid_input_ecx = wi->cpuid.ecx;
+ qwi->cpuid_register = get_register_enum_32(w);
+ qwi->features = array[w];
+
+ /* List will be in reverse order, but order shouldn't matter */
+ list_entries[w].next = list;
+ list_entries[w].value = &word_infos[w];
+ list = &list_entries[w];
+ }
+
+ visit_type_X86CPUFeatureWordInfoList(v, "feature-words", &list, errp);
+}
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index ffa342171ba..c088bcf3113 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -27,7 +27,7 @@
#include "sysemu/hvf.h"
#include "kvm/kvm_i386.h"
#include "sev_i386.h"
-#include "qapi/qapi-visit-machine.h"
+#include "qapi/qapi-builtin-visit.h"
#include "qapi/qmp/qerror.h"
#include "qapi/qapi-commands-machine-target.h"
#include "standard-headers/asm-x86/kvm_para.h"
@@ -4529,42 +4529,6 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, const char *name,
cpu->env.tsc_khz = cpu->env.user_tsc_khz = value / 1000;
}
-/* Generic getter for "feature-words" and "filtered-features" properties */
-static void x86_cpu_get_feature_words(Object *obj, Visitor *v,
- const char *name, void *opaque,
- Error **errp)
-{
- uint64_t *array = (uint64_t *)opaque;
- FeatureWord w;
- X86CPUFeatureWordInfo word_infos[FEATURE_WORDS] = { };
- X86CPUFeatureWordInfoList list_entries[FEATURE_WORDS] = { };
- X86CPUFeatureWordInfoList *list = NULL;
-
- for (w = 0; w < FEATURE_WORDS; w++) {
- FeatureWordInfo *wi = &feature_word_info[w];
- /*
- * We didn't have MSR features when "feature-words" was
- * introduced. Therefore skipped other type entries.
- */
- if (wi->type != CPUID_FEATURE_WORD) {
- continue;
- }
- X86CPUFeatureWordInfo *qwi = &word_infos[w];
- qwi->cpuid_input_eax = wi->cpuid.eax;
- qwi->has_cpuid_input_ecx = wi->cpuid.needs_ecx;
- qwi->cpuid_input_ecx = wi->cpuid.ecx;
- qwi->cpuid_register = get_register_enum_32(w);
- qwi->features = array[w];
-
- /* List will be in reverse order, but order shouldn't matter */
- list_entries[w].next = list;
- list_entries[w].value = &word_infos[w];
- list = &list_entries[w];
- }
-
- visit_type_X86CPUFeatureWordInfoList(v, "feature-words", &list, errp);
-}
-
/* Convert all '_' in a feature string option name to '-', to make feature
* name conform to QOM property naming rule, which uses '-' instead of '_'.
*/
@@ -6422,12 +6386,14 @@ static void x86_cpu_initfn(Object *obj)
env->nr_dies = 1;
cpu_set_cpustate_pointers(cpu);
+#if !defined(CONFIG_USER_ONLY)
object_property_add(obj, "feature-words", "X86CPUFeatureWordInfo",
x86_cpu_get_feature_words,
NULL, NULL, (void *)env->features);
object_property_add(obj, "filtered-features", "X86CPUFeatureWordInfo",
x86_cpu_get_feature_words,
NULL, NULL, (void *)cpu->filtered_features);
+#endif /* !CONFIG_USER_ONLY */
object_property_add_alias(obj, "sse3", obj, "pni");
object_property_add_alias(obj, "pclmuldq", obj, "pclmulqdq");
--
2.26.2
next prev parent reply other threads:[~2021-02-24 22:48 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-24 22:46 [PATCH v5 0/4] qapi: Restrict X86 features to X86 targets Philippe Mathieu-Daudé
2021-02-24 22:46 ` [PATCH v5 1/4] target/i386/cpu: Introduce get_register_enum_32() helper Philippe Mathieu-Daudé
2021-02-24 22:46 ` Philippe Mathieu-Daudé [this message]
2021-02-24 22:46 ` [PATCH v5 3/4] qapi: Move X86 specific types to machine-target.json Philippe Mathieu-Daudé
2021-02-24 22:46 ` [PATCH v5 4/4] qapi/machine-target: Restrict X86 features to X86 targets Philippe Mathieu-Daudé
2021-03-09 22:27 ` [PATCH v5 0/4] qapi: " Philippe Mathieu-Daudé
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