From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Sarah Harris" <S.E.Harris@kent.ac.uk>,
"Chris Wulff" <crwulff@gmail.com>,
"Sagar Karandikar" <sagark@eecs.berkeley.edu>,
"David Hildenbrand" <david@redhat.com>,
"Anthony Green" <green@moxielogic.com>,
"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Thomas Huth" <thuth@redhat.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Max Filippov" <jcmvbkbc@gmail.com>,
"Alistair Francis" <Alistair.Francis@wdc.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Guan Xuetao" <gxt@mprc.pku.edu.cn>,
"Marek Vasut" <marex@denx.de>,
"Yoshinori Sato" <ysato@users.sourceforge.jp>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Claudio Fontana" <cfontana@suse.de>,
qemu-ppc@nongnu.org, "Artyom Tarasenko" <atar4qemu@gmail.com>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Greg Kurz" <groug@kaod.org>,
qemu-s390x@nongnu.org, qemu-arm@nongnu.org,
"Michael Rolnik" <mrolnik@gmail.com>,
"Stafford Horne" <shorne@gmail.com>,
"David Gibson" <david@gibson.dropbear.id.au>,
qemu-riscv@nongnu.org,
"Bastian Koppelmann" <kbastian@mail.uni-paderborn.de>,
"Cornelia Huck" <cohuck@redhat.com>,
"Laurent Vivier" <laurent@vivier.eu>,
"Michael Walle" <michael@walle.cc>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH v2 01/17] target: Set CPUClass::vmsd instead of DeviceClass::vmsd
Date: Mon, 1 Mar 2021 22:50:54 +0100 [thread overview]
Message-ID: <20210301215110.772346-2-f4bug@amsat.org> (raw)
In-Reply-To: <20210301215110.772346-1-f4bug@amsat.org>
The cpu model is the single device available in user-mode.
Since we want to restrict some fields to user-mode emulation,
we prefer to set the vmsd field of CPUClass, rather than the
DeviceClass one.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/alpha/cpu.c | 2 +-
target/cris/cpu.c | 2 +-
target/hppa/cpu.c | 2 +-
target/m68k/cpu.c | 2 +-
target/microblaze/cpu.c | 2 +-
target/openrisc/cpu.c | 2 +-
target/sh4/cpu.c | 2 +-
target/unicore32/cpu.c | 2 +-
target/xtensa/cpu.c | 2 +-
9 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 27192b62e22..faabffe0796 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -237,7 +237,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data)
cc->gdb_write_register = alpha_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;
- dc->vmsd = &vmstate_alpha_cpu;
+ cc->vmsd = &vmstate_alpha_cpu;
#endif
cc->disas_set_info = alpha_cpu_disas_set_info;
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index ed983380fca..29a865b75d2 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -293,7 +293,7 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data)
cc->gdb_write_register = cris_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = cris_cpu_get_phys_page_debug;
- dc->vmsd = &vmstate_cris_cpu;
+ cc->vmsd = &vmstate_cris_cpu;
#endif
cc->gdb_num_core_regs = 49;
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index d8fad52d1fe..4f142de6e45 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -162,7 +162,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
cc->gdb_write_register = hppa_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = hppa_cpu_get_phys_page_debug;
- dc->vmsd = &vmstate_hppa_cpu;
+ cc->vmsd = &vmstate_hppa_cpu;
#endif
cc->disas_set_info = hppa_cpu_disas_set_info;
cc->gdb_num_core_regs = 128;
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 37d2ed9dc79..c98fb1e33be 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -533,7 +533,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
cc->gdb_write_register = m68k_cpu_gdb_write_register;
#if defined(CONFIG_SOFTMMU)
cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
- dc->vmsd = &vmstate_m68k_cpu;
+ cc->vmsd = &vmstate_m68k_cpu;
#endif
cc->disas_set_info = m68k_cpu_disas_set_info;
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 433ba202037..335dfdc734e 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -387,7 +387,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_attrs_debug = mb_cpu_get_phys_page_attrs_debug;
- dc->vmsd = &vmstate_mb_cpu;
+ cc->vmsd = &vmstate_mb_cpu;
#endif
device_class_set_props(dc, mb_properties);
cc->gdb_num_core_regs = 32 + 27;
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 2c64842f46b..79d246d1930 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -204,7 +204,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
cc->gdb_write_register = openrisc_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = openrisc_cpu_get_phys_page_debug;
- dc->vmsd = &vmstate_openrisc_cpu;
+ cc->vmsd = &vmstate_openrisc_cpu;
#endif
cc->gdb_num_core_regs = 32 + 3;
cc->disas_set_info = openrisc_disas_set_info;
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index ac65c88f1f8..bd44de53729 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -262,7 +262,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
cc->gdb_num_core_regs = 59;
- dc->vmsd = &vmstate_sh_cpu;
+ cc->vmsd = &vmstate_sh_cpu;
cc->tcg_ops = &superh_tcg_ops;
}
diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c
index 0258884f845..12894ffac6a 100644
--- a/target/unicore32/cpu.c
+++ b/target/unicore32/cpu.c
@@ -146,7 +146,7 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data)
cc->dump_state = uc32_cpu_dump_state;
cc->set_pc = uc32_cpu_set_pc;
cc->get_phys_page_debug = uc32_cpu_get_phys_page_debug;
- dc->vmsd = &vmstate_uc32_cpu;
+ cc->vmsd = &vmstate_uc32_cpu;
cc->tcg_ops = &uc32_tcg_ops;
}
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index e2b2c7a71c1..6bedd5b97b8 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -218,7 +218,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug;
#endif
cc->disas_set_info = xtensa_cpu_disas_set_info;
- dc->vmsd = &vmstate_xtensa_cpu;
+ cc->vmsd = &vmstate_xtensa_cpu;
cc->tcg_ops = &xtensa_tcg_ops;
}
--
2.26.2
next prev parent reply other threads:[~2021-03-01 21:53 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-01 21:50 [PATCH v2 00/17] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-03-01 21:50 ` Philippe Mathieu-Daudé [this message]
2021-03-01 21:50 ` [PATCH v2 02/17] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs Philippe Mathieu-Daudé
2021-03-01 21:50 ` [PATCH v2 03/17] cpu: Introduce cpu_virtio_is_big_endian() Philippe Mathieu-Daudé
2021-03-01 21:50 ` [PATCH v2 04/17] cpu: Directly use cpu_write_elf*() fallback handlers in place Philippe Mathieu-Daudé
2021-03-01 21:50 ` [PATCH v2 05/17] cpu: Directly use get_paging_enabled() " Philippe Mathieu-Daudé
2021-03-01 21:50 ` [PATCH v2 06/17] cpu: Directly use get_memory_mapping() " Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 07/17] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 08/17] cpu: Move CPUClass::vmsd to SysemuCPUOps Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 09/17] cpu: Move CPUClass::virtio_is_big_endian " Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 10/17] cpu: Move CPUClass::get_crash_info " Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 11/17] cpu: Move CPUClass::write_elf* " Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 12/17] cpu: Move CPUClass::asidx_from_attrs " Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 13/17] cpu: Move CPUClass::get_phys_page_debug " Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 14/17] cpu: Move CPUClass::get_memory_mapping " Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 15/17] cpu: Move CPUClass::get_paging_enabled " Philippe Mathieu-Daudé
2021-03-01 21:51 ` [PATCH v2 16/17] cpu: Restrict cpu_paging_enabled / cpu_get_memory_mapping to sysemu Philippe Mathieu-Daudé
2021-03-02 12:34 ` Claudio Fontana
2021-03-02 12:39 ` Philippe Mathieu-Daudé
2021-03-01 21:51 ` [RFC PATCH v2 17/17] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c Philippe Mathieu-Daudé
2021-03-02 7:34 ` Philippe Mathieu-Daudé
2021-03-02 12:35 ` [PATCH v2 00/17] cpu: Introduce SysemuCPUOps structure Claudio Fontana
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210301215110.772346-2-f4bug@amsat.org \
--to=f4bug@amsat.org \
--cc=Alistair.Francis@wdc.com \
--cc=S.E.Harris@kent.ac.uk \
--cc=aleksandar.rikalo@syrmia.com \
--cc=atar4qemu@gmail.com \
--cc=aurelien@aurel32.net \
--cc=cfontana@suse.de \
--cc=cohuck@redhat.com \
--cc=crwulff@gmail.com \
--cc=david@gibson.dropbear.id.au \
--cc=david@redhat.com \
--cc=edgar.iglesias@gmail.com \
--cc=ehabkost@redhat.com \
--cc=green@moxielogic.com \
--cc=groug@kaod.org \
--cc=gxt@mprc.pku.edu.cn \
--cc=jcmvbkbc@gmail.com \
--cc=kbastian@mail.uni-paderborn.de \
--cc=laurent@vivier.eu \
--cc=marex@denx.de \
--cc=mark.cave-ayland@ilande.co.uk \
--cc=michael@walle.cc \
--cc=mrolnik@gmail.com \
--cc=mst@redhat.com \
--cc=palmer@dabbelt.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=qemu-s390x@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=sagark@eecs.berkeley.edu \
--cc=shorne@gmail.com \
--cc=thuth@redhat.com \
--cc=ysato@users.sourceforge.jp \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).