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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id y11sm18000261ejd.72.2021.03.02.06.58.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Mar 2021 06:58:22 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v3 00/27] cpu: Introduce SysemuCPUOps structure, remove watchpoints from usermode Date: Tue, 2 Mar 2021 15:57:51 +0100 Message-Id: <20210302145818.1161461-1-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-x62e.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Sarah Harris , Chris Wulff , Sagar Karandikar , David Hildenbrand , Anthony Green , Mark Cave-Ayland , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Max Filippov , Taylor Simpson , Alistair Francis , "Edgar E. Iglesias" , Guan Xuetao , Marek Vasut , Yoshinori Sato , "Michael S. Tsirkin" , Claudio Fontana , Palmer Dabbelt , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Artyom Tarasenko , Thomas Huth , Eduardo Habkost , Richard Henderson , Greg Kurz , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , =?UTF-8?q?Alex=20Benn=C3=A9e?= , David Gibson , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , Laurent Vivier , Michael Walle , qemu-ppc@nongnu.org, Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi,=0D =0D This series is inspired on Claudio TCG work.=0D =0D Instead of separate TCG from other accelerators, here we=0D separate sysemu operations (system VS user).=0D =0D Patches 1-6 are generic cleanups.=0D Patches 7-15 move from CPUClass to SysemuCPUOps=0D Patch 16 restricts SysemuCPUOps to sysemu=0D Patches 17-25 remove watchpoint code from user emulation=0D Patches 26-27 remove USER_ONLY #ifdef'ry from "cpu.h"=0D =0D Since v2:=0D - fixed lm32/unicore32=0D - remove USER_ONLY ifdef'ry from "cpu.h" (Claudio)=0D =0D Since v1:=0D - Name 'sysemu' (Claudio)=0D - change each field progressively (Richard)=0D =0D $ git backport-diff -u v2=0D Key:=0D [----] : patches are identical=0D [####] : number of functional differences between upstream/downstream patch= =0D [down] : patch is downstream-only=0D The flags [FC] indicate (F)unctional and (C)ontextual differences, respecti= ve=3D=0D ly=0D =0D 001/27:[----] [--] 'target: Set CPUClass::vmsd instead of DeviceClass::vmsd= '=0D 002/27:[----] [--] 'cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_fr= om=3D=0D _attrs'=0D 003/27:[----] [--] 'cpu: Introduce cpu_virtio_is_big_endian()'=0D 004/27:[----] [--] 'cpu: Directly use cpu_write_elf*() fallback handlers in= p=3D=0D lace'=0D 005/27:[----] [--] 'cpu: Directly use get_paging_enabled() fallback handler= s =3D=0D in place'=0D 006/27:[----] [--] 'cpu: Directly use get_memory_mapping() fallback handler= s =3D=0D in place'=0D 007/27:[----] [--] 'cpu: Introduce SysemuCPUOps structure'=0D 008/27:[----] [--] 'cpu: Move CPUClass::vmsd to SysemuCPUOps'=0D 009/27:[----] [--] 'cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOp= s'=0D 010/27:[----] [--] 'cpu: Move CPUClass::get_crash_info to SysemuCPUOps'=0D 011/27:[----] [--] 'cpu: Move CPUClass::write_elf* to SysemuCPUOps'=0D 012/27:[----] [--] 'cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps'=0D 013/27:[----] [--] 'cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps= '=0D 014/27:[----] [--] 'cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps'= =0D 015/27:[----] [--] 'cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps'= =0D 016/27:[0084] [FC] 'cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.= c'=0D 017/27:[down] 'linux-user: Remove dead code'=0D 018/27:[down] 'gdbstub: Remove watchpoint dead code in gdbserver_fork()'=0D 019/27:[down] 'target/arm/internals: Fix code style for checkpatch.pl'=0D 020/27:[down] 'target/arm: Move code blocks around'=0D 021/27:[down] 'target/arm: Refactor some function bodies'=0D 022/27:[down] 'target/arm: Restrict watchpoint code to system emulation'=0D 023/27:[down] 'target/i386: Restrict watchpoint code to system emulation'=0D 024/27:[down] 'accel/tcg/cpu-exec: Restrict watchpoint code to system emula= ti=3D=0D on'=0D 025/27:[down] 'cpu: Remove watchpoint stubs for user emulation'=0D 026/27:[down] 'cpu: Fix code style for checkpatch.pl'=0D 027/27:[down] 'cpu: Move sysemu specific declarations to 'sysemu-cpu-ops.h'= '=0D =0D Regards,=0D =0D Phil.=0D =0D Supersedes: <20210301215110.772346-1-f4bug@amsat.org>=0D =0D Philippe Mathieu-Daud=3DC3=3DA9 (27):=0D target: Set CPUClass::vmsd instead of DeviceClass::vmsd=0D cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs=0D cpu: Introduce cpu_virtio_is_big_endian()=0D cpu: Directly use cpu_write_elf*() fallback handlers in place=0D cpu: Directly use get_paging_enabled() fallback handlers in place=0D cpu: Directly use get_memory_mapping() fallback handlers in place=0D cpu: Introduce SysemuCPUOps structure=0D cpu: Move CPUClass::vmsd to SysemuCPUOps=0D cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps=0D cpu: Move CPUClass::get_crash_info to SysemuCPUOps=0D cpu: Move CPUClass::write_elf* to SysemuCPUOps=0D cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps=0D cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps=0D cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps=0D cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps=0D cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c=0D linux-user: Remove dead code=0D gdbstub: Remove watchpoint dead code in gdbserver_fork()=0D target/arm/internals: Fix code style for checkpatch.pl=0D target/arm: Move code blocks around=0D target/arm: Refactor some function bodies=0D target/arm: Restrict watchpoint code to system emulation=0D target/i386: Restrict watchpoint code to system emulation=0D accel/tcg/cpu-exec: Restrict watchpoint code to system emulation=0D cpu: Remove watchpoint stubs for user emulation=0D cpu: Fix code style for checkpatch.pl=0D cpu: Move sysemu specific declarations to 'sysemu-cpu-ops.h'=0D =0D include/hw/core/cpu.h | 258 +------------------------------=0D include/hw/core/sysemu-cpu-ops.h | 244 +++++++++++++++++++++++++++++=0D target/alpha/cpu.h | 3 +=0D target/arm/cpu.h | 3 +=0D target/arm/internals.h | 34 ++--=0D target/avr/cpu.h | 1 +=0D target/cris/cpu.h | 3 +=0D target/hexagon/cpu.h | 3 +=0D target/hppa/cpu.h | 3 +=0D target/i386/cpu.h | 3 +=0D target/lm32/cpu.h | 3 +=0D target/m68k/cpu.h | 3 +=0D target/microblaze/cpu.h | 1 +=0D target/mips/cpu.h | 3 +=0D target/moxie/cpu.h | 3 +=0D target/nios2/cpu.h | 1 +=0D target/openrisc/cpu.h | 3 +=0D target/ppc/cpu.h | 3 +=0D target/riscv/cpu.h | 3 +=0D target/rx/cpu.h | 1 +=0D target/s390x/cpu.h | 3 +=0D target/sh4/cpu.h | 3 +=0D target/sparc/cpu.h | 3 +=0D target/tilegx/cpu.h | 3 +=0D target/tricore/cpu.h | 3 +=0D target/unicore32/cpu.h | 3 +=0D target/xtensa/cpu.h | 3 +=0D accel/tcg/cpu-exec.c | 5 +-=0D cpu.c | 19 ++-=0D gdbstub.c | 2 +-=0D hw/core/cpu.c | 113 ++++++++------=0D hw/virtio/virtio.c | 4 +-=0D linux-user/main.c | 5 -=0D softmmu/physmem.c | 1 +=0D target/alpha/cpu.c | 10 +-=0D target/arm/cpu.c | 22 ++-=0D target/arm/debug_helper.c | 102 ++++++------=0D target/arm/helper.c | 9 +-=0D target/avr/cpu.c | 8 +-=0D target/cris/cpu.c | 10 +-=0D target/hppa/cpu.c | 10 +-=0D target/i386/cpu.c | 31 ++--=0D target/lm32/cpu.c | 10 +-=0D target/m68k/cpu.c | 10 +-=0D target/microblaze/cpu.c | 10 +-=0D target/mips/cpu.c | 10 +-=0D target/moxie/cpu.c | 10 +-=0D target/nios2/cpu.c | 15 +-=0D target/openrisc/cpu.c | 10 +-=0D target/riscv/cpu.c | 12 +-=0D target/rx/cpu.c | 16 +-=0D target/s390x/cpu.c | 14 +-=0D target/sh4/cpu.c | 10 +-=0D target/sparc/cpu.c | 10 +-=0D target/tricore/cpu.c | 13 +-=0D target/unicore32/cpu.c | 8 +-=0D target/xtensa/cpu.c | 10 +-=0D target/ppc/translate_init.c.inc | 20 +--=0D 58 files changed, 686 insertions(+), 453 deletions(-)=0D create mode 100644 include/hw/core/sysemu-cpu-ops.h=0D =0D --=3D20=0D 2.26.2=0D =0D