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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 07/49] hw/arm: Add npcm7xx emc model
Date: Fri,  5 Mar 2021 17:14:33 +0000	[thread overview]
Message-ID: <20210305171515.1038-8-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210305171515.1038-1-peter.maydell@linaro.org>

From: Doug Evans <dje@google.com>

This is a 10/100 ethernet device that has several features.
Only the ones needed by the Linux driver have been implemented.
See npcm7xx_emc.c for a list of unimplemented features.

Reviewed-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Avi Fishman <avi.fishman@nuvoton.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Doug Evans <dje@google.com>
Message-id: 20210218212453.831406-3-dje@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 docs/system/arm/nuvoton.rst |  3 ++-
 include/hw/arm/npcm7xx.h    |  2 ++
 hw/arm/npcm7xx.c            | 50 +++++++++++++++++++++++++++++++++++--
 3 files changed, 52 insertions(+), 3 deletions(-)

diff --git a/docs/system/arm/nuvoton.rst b/docs/system/arm/nuvoton.rst
index 34fc799b2df..f9fb9224da9 100644
--- a/docs/system/arm/nuvoton.rst
+++ b/docs/system/arm/nuvoton.rst
@@ -44,6 +44,7 @@ Supported devices
  * Analog to Digital Converter (ADC)
  * Pulse Width Modulation (PWM)
  * SMBus controller (SMBF)
+ * Ethernet controller (EMC)
 
 Missing devices
 ---------------
@@ -57,7 +58,7 @@ Missing devices
    * Shared memory (SHM)
    * eSPI slave interface
 
- * Ethernet controllers (GMAC and EMC)
+ * Ethernet controller (GMAC)
  * USB device (USBD)
  * Peripheral SPI controller (PSPI)
  * SD/MMC host
diff --git a/include/hw/arm/npcm7xx.h b/include/hw/arm/npcm7xx.h
index cea1bd1f620..d32849a456b 100644
--- a/include/hw/arm/npcm7xx.h
+++ b/include/hw/arm/npcm7xx.h
@@ -26,6 +26,7 @@
 #include "hw/misc/npcm7xx_gcr.h"
 #include "hw/misc/npcm7xx_pwm.h"
 #include "hw/misc/npcm7xx_rng.h"
+#include "hw/net/npcm7xx_emc.h"
 #include "hw/nvram/npcm7xx_otp.h"
 #include "hw/timer/npcm7xx_timer.h"
 #include "hw/ssi/npcm7xx_fiu.h"
@@ -90,6 +91,7 @@ typedef struct NPCM7xxState {
     EHCISysBusState     ehci;
     OHCISysBusState     ohci;
     NPCM7xxFIUState     fiu[2];
+    NPCM7xxEMCState     emc[2];
 } NPCM7xxState;
 
 #define TYPE_NPCM7XX    "npcm7xx"
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index f8950f94708..9bd1e83f021 100644
--- a/hw/arm/npcm7xx.c
+++ b/hw/arm/npcm7xx.c
@@ -82,6 +82,8 @@ enum NPCM7xxInterrupt {
     NPCM7XX_UART1_IRQ,
     NPCM7XX_UART2_IRQ,
     NPCM7XX_UART3_IRQ,
+    NPCM7XX_EMC1RX_IRQ          = 15,
+    NPCM7XX_EMC1TX_IRQ,
     NPCM7XX_TIMER0_IRQ          = 32,   /* Timer Module 0 */
     NPCM7XX_TIMER1_IRQ,
     NPCM7XX_TIMER2_IRQ,
@@ -120,6 +122,8 @@ enum NPCM7xxInterrupt {
     NPCM7XX_SMBUS15_IRQ,
     NPCM7XX_PWM0_IRQ            = 93,   /* PWM module 0 */
     NPCM7XX_PWM1_IRQ,                   /* PWM module 1 */
+    NPCM7XX_EMC2RX_IRQ          = 114,
+    NPCM7XX_EMC2TX_IRQ,
     NPCM7XX_GPIO0_IRQ           = 116,
     NPCM7XX_GPIO1_IRQ,
     NPCM7XX_GPIO2_IRQ,
@@ -188,6 +192,12 @@ static const hwaddr npcm7xx_smbus_addr[] = {
     0xf008f000,
 };
 
+/* Register base address for each EMC Module */
+static const hwaddr npcm7xx_emc_addr[] = {
+    0xf0825000,
+    0xf0826000,
+};
+
 static const struct {
     hwaddr regs_addr;
     uint32_t unconnected_pins;
@@ -406,6 +416,10 @@ static void npcm7xx_init(Object *obj)
     for (i = 0; i < ARRAY_SIZE(s->pwm); i++) {
         object_initialize_child(obj, "pwm[*]", &s->pwm[i], TYPE_NPCM7XX_PWM);
     }
+
+    for (i = 0; i < ARRAY_SIZE(s->emc); i++) {
+        object_initialize_child(obj, "emc[*]", &s->emc[i], TYPE_NPCM7XX_EMC);
+    }
 }
 
 static void npcm7xx_realize(DeviceState *dev, Error **errp)
@@ -589,6 +603,40 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
         sysbus_connect_irq(sbd, i, npcm7xx_irq(s, NPCM7XX_PWM0_IRQ + i));
     }
 
+    /*
+     * EMC Modules. Cannot fail.
+     * The mapping of the device to its netdev backend works as follows:
+     * emc[i] = nd_table[i]
+     * This works around the inability to specify the netdev property for the
+     * emc device: it's not pluggable and thus the -device option can't be
+     * used.
+     */
+    QEMU_BUILD_BUG_ON(ARRAY_SIZE(npcm7xx_emc_addr) != ARRAY_SIZE(s->emc));
+    QEMU_BUILD_BUG_ON(ARRAY_SIZE(s->emc) != 2);
+    for (i = 0; i < ARRAY_SIZE(s->emc); i++) {
+        s->emc[i].emc_num = i;
+        SysBusDevice *sbd = SYS_BUS_DEVICE(&s->emc[i]);
+        if (nd_table[i].used) {
+            qemu_check_nic_model(&nd_table[i], TYPE_NPCM7XX_EMC);
+            qdev_set_nic_properties(DEVICE(sbd), &nd_table[i]);
+        }
+        /*
+         * The device exists regardless of whether it's connected to a QEMU
+         * netdev backend. So always instantiate it even if there is no
+         * backend.
+         */
+        sysbus_realize(sbd, &error_abort);
+        sysbus_mmio_map(sbd, 0, npcm7xx_emc_addr[i]);
+        int tx_irq = i == 0 ? NPCM7XX_EMC1TX_IRQ : NPCM7XX_EMC2TX_IRQ;
+        int rx_irq = i == 0 ? NPCM7XX_EMC1RX_IRQ : NPCM7XX_EMC2RX_IRQ;
+        /*
+         * N.B. The values for the second argument sysbus_connect_irq are
+         * chosen to match the registration order in npcm7xx_emc_realize.
+         */
+        sysbus_connect_irq(sbd, 0, npcm7xx_irq(s, tx_irq));
+        sysbus_connect_irq(sbd, 1, npcm7xx_irq(s, rx_irq));
+    }
+
     /*
      * Flash Interface Unit (FIU). Can fail if incorrect number of chip selects
      * specified, but this is a programming error.
@@ -649,8 +697,6 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
     create_unimplemented_device("npcm7xx.vcd",          0xf0810000,  64 * KiB);
     create_unimplemented_device("npcm7xx.ece",          0xf0820000,   8 * KiB);
     create_unimplemented_device("npcm7xx.vdma",         0xf0822000,   8 * KiB);
-    create_unimplemented_device("npcm7xx.emc1",         0xf0825000,   4 * KiB);
-    create_unimplemented_device("npcm7xx.emc2",         0xf0826000,   4 * KiB);
     create_unimplemented_device("npcm7xx.usbd[0]",      0xf0830000,   4 * KiB);
     create_unimplemented_device("npcm7xx.usbd[1]",      0xf0831000,   4 * KiB);
     create_unimplemented_device("npcm7xx.usbd[2]",      0xf0832000,   4 * KiB);
-- 
2.20.1



  parent reply	other threads:[~2021-03-05 17:34 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-05 17:14 [PULL 00/49] target-arm queue Peter Maydell
2021-03-05 17:14 ` [PULL 01/49] sbsa-ref: remove cortex-a53 from list of supported cpus Peter Maydell
2021-03-05 17:14 ` [PULL 02/49] sbsa-ref: add 'max' to list of allowed cpus Peter Maydell
2021-03-05 17:14 ` [PULL 03/49] target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe Peter Maydell
2021-03-05 17:14 ` [PULL 04/49] target/arm: Enable FEAT_SSBS for "max" AARCH64 CPU Peter Maydell
2021-03-05 17:14 ` [PULL 05/49] target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU Peter Maydell
2021-03-05 17:14 ` [PULL 06/49] hw/net: Add npcm7xx emc model Peter Maydell
2021-03-05 17:14 ` Peter Maydell [this message]
2021-03-05 17:14 ` [PULL 08/49] tests/qtests: Add npcm7xx emc model test Peter Maydell
2021-03-05 17:14 ` [PULL 09/49] hw/arm/xlnx-zynqmp: Remove obsolete 'has_rpu' property Peter Maydell
2021-03-05 17:14 ` [PULL 10/49] target/arm: Speed up aarch64 TBL/TBX Peter Maydell
2021-03-05 17:14 ` [PULL 11/49] hw/i2c/npcm7xx_smbus: Simplify npcm7xx_smbus_init() Peter Maydell
2021-03-05 17:14 ` [PULL 12/49] virtio-mmio: improve virtio-mmio get_dev_path alog Peter Maydell
2021-03-05 17:14 ` [PULL 13/49] target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks Peter Maydell
2021-03-05 17:14 ` [PULL 14/49] target/arm: Restrict v8M IDAU to TCG Peter Maydell
2021-03-05 17:14 ` [PULL 15/49] target/arm/cpu: Update coding style to make checkpatch.pl happy Peter Maydell
2021-03-05 17:14 ` [PULL 16/49] hw/arm/musicpal: Remove dead code for non-32-bit-RGB surfaces Peter Maydell
2021-03-05 17:14 ` [PULL 17/49] hw/display/tc6393xb: Remove dead code for handling non-32bpp surfaces Peter Maydell
2021-03-05 17:14 ` [PULL 18/49] hw/display/tc6393xb: Expand out macros in template header Peter Maydell
2021-03-05 17:14 ` [PULL 19/49] hw/display/tc6393xb: Inline tc6393xb_draw_graphic32() at its callsite Peter Maydell
2021-03-05 17:14 ` [PULL 20/49] hw/display/omap_lcdc: Expand out macros in template header Peter Maydell
2021-03-05 17:14 ` [PULL 21/49] hw/display/omap_lcdc: Drop broken bigendian ifdef Peter Maydell
2021-03-05 17:14 ` [PULL 22/49] hw/display/omap_lcdc: Fix coding style issues in template header Peter Maydell
2021-03-05 17:14 ` [PULL 23/49] hw/display/omap_lcdc: Inline template header into C file Peter Maydell
2021-03-05 17:14 ` [PULL 24/49] hw/display/omap_lcdc: Delete unnecessary macro Peter Maydell
2021-03-05 17:14 ` [PULL 25/49] hw/display/tcx: Drop unnecessary code for handling BGR format outputs Peter Maydell
2021-03-05 17:14 ` [PULL 26/49] hw/arm/mps2-tz: Make SYSCLK frequency board-specific Peter Maydell
2021-03-05 17:14 ` [PULL 27/49] hw/misc/mps2-scc: Support configurable number of OSCCLK values Peter Maydell
2021-03-05 17:14 ` [PULL 28/49] hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an511 Peter Maydell
2021-03-05 17:14 ` [PULL 29/49] hw/arm/mps2-tz: Make the OSCCLK settings be configurable per-board Peter Maydell
2021-03-05 17:14 ` [PULL 30/49] hw/misc/mps2-fpgaio: Make number of LEDs configurable by board Peter Maydell
2021-03-05 17:14 ` [PULL 31/49] hw/misc/mps2-fpgaio: Support SWITCH register Peter Maydell
2021-03-05 17:14 ` [PULL 32/49] hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board Peter Maydell
2021-03-05 17:14 ` [PULL 33/49] hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type Peter Maydell
2021-03-05 17:15 ` [PULL 34/49] hw/arm/mps2-tz: Make number of IRQs board-specific Peter Maydell
2021-03-05 17:15 ` [PULL 35/49] hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524 Peter Maydell
2021-03-05 17:15 ` [PULL 36/49] hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI Peter Maydell
2021-03-05 17:15 ` [PULL 37/49] hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrupts Peter Maydell
2021-03-05 17:15 ` [PULL 38/49] hw/arm/mps2-tz: Move device IRQ info to data structures Peter Maydell
2021-03-05 17:15 ` [PULL 39/49] hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs Peter Maydell
2021-03-05 17:15 ` [PULL 40/49] hw/arm/mps2-tz: Allow boards to have different PPCInfo data Peter Maydell
2021-03-05 17:15 ` [PULL 41/49] hw/arm/mps2-tz: Make RAM arrangement board-specific Peter Maydell
2021-03-05 17:15 ` [PULL 42/49] hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data Peter Maydell
2021-03-05 17:15 ` [PULL 43/49] hw/arm/mps2-tz: Support ROMs as well as RAMs Peter Maydell
2021-03-05 17:15 ` [PULL 44/49] hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo Peter Maydell
2021-03-05 17:15 ` [PULL 45/49] hw/arm/mps2-tz: Add new mps3-an524 board Peter Maydell
2021-03-05 17:15 ` [PULL 46/49] hw/arm/mps2-tz: Stub out USB controller for mps3-an524 Peter Maydell
2021-03-05 17:15 ` [PULL 47/49] hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524 Peter Maydell
2021-03-05 17:15 ` [PULL 48/49] docs/system/arm/mps2.rst: Document the new mps3-an524 board Peter Maydell
2021-03-05 17:15 ` [PULL 49/49] hw/arm/mps2: Update old infocenter.arm.com URLs Peter Maydell
2021-03-05 18:36 ` [PULL 00/49] target-arm queue no-reply

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