From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 11/27] tcg/tci: Merge identical cases in generation (load/store opcodes)
Date: Sat, 6 Mar 2021 13:35:57 -0800 [thread overview]
Message-ID: <20210306213613.85168-12-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210306213613.85168-1-richard.henderson@linaro.org>
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
cases that are identical between 32-bit and 64-bit hosts.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>
[PMD: Split patch as 5/5]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210218232840.1760806-6-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tci/tcg-target.c.inc | 49 ++++++++++++----------------------------
1 file changed, 14 insertions(+), 35 deletions(-)
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index f9893b9539..c79f9c32d8 100644
--- a/tcg/tci/tcg-target.c.inc
+++ b/tcg/tci/tcg-target.c.inc
@@ -440,25 +440,20 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
tcg_out8(s, args[5]); /* condition */
break;
#endif
- case INDEX_op_ld8u_i32:
- case INDEX_op_ld8s_i32:
- case INDEX_op_ld16u_i32:
- case INDEX_op_ld16s_i32:
+
+ CASE_32_64(ld8u)
+ CASE_32_64(ld8s)
+ CASE_32_64(ld16u)
+ CASE_32_64(ld16s)
case INDEX_op_ld_i32:
- case INDEX_op_st8_i32:
- case INDEX_op_st16_i32:
+ CASE_64(ld32u)
+ CASE_64(ld32s)
+ CASE_64(ld)
+ CASE_32_64(st8)
+ CASE_32_64(st16)
case INDEX_op_st_i32:
- case INDEX_op_ld8u_i64:
- case INDEX_op_ld8s_i64:
- case INDEX_op_ld16u_i64:
- case INDEX_op_ld16s_i64:
- case INDEX_op_ld32u_i64:
- case INDEX_op_ld32s_i64:
- case INDEX_op_ld_i64:
- case INDEX_op_st8_i64:
- case INDEX_op_st16_i64:
- case INDEX_op_st32_i64:
- case INDEX_op_st_i64:
+ CASE_64(st32)
+ CASE_64(st)
stack_bounds_check(args[1], args[2]);
tcg_out_r(s, args[0]);
tcg_out_r(s, args[1]);
@@ -552,24 +547,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
#endif
case INDEX_op_qemu_ld_i32:
- tcg_out_r(s, *args++);
- tcg_out_r(s, *args++);
- if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) {
- tcg_out_r(s, *args++);
- }
- tcg_out_i(s, *args++);
- break;
- case INDEX_op_qemu_ld_i64:
- tcg_out_r(s, *args++);
- if (TCG_TARGET_REG_BITS == 32) {
- tcg_out_r(s, *args++);
- }
- tcg_out_r(s, *args++);
- if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) {
- tcg_out_r(s, *args++);
- }
- tcg_out_i(s, *args++);
- break;
case INDEX_op_qemu_st_i32:
tcg_out_r(s, *args++);
tcg_out_r(s, *args++);
@@ -578,6 +555,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
}
tcg_out_i(s, *args++);
break;
+
+ case INDEX_op_qemu_ld_i64:
case INDEX_op_qemu_st_i64:
tcg_out_r(s, *args++);
if (TCG_TARGET_REG_BITS == 32) {
--
2.25.1
next prev parent reply other threads:[~2021-03-06 21:44 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-06 21:35 [PULL 00/27] tcg patch queue Richard Henderson
2021-03-06 21:35 ` [PULL 01/27] tcg/aarch64: Fix constant subtraction in tcg_out_addsub2 Richard Henderson
2021-03-06 21:35 ` [PULL 02/27] tcg/aarch64: Fix I3617_CMLE0 Richard Henderson
2021-03-06 21:35 ` [PULL 03/27] tcg/aarch64: Fix generation of "scalar" vector operations Richard Henderson
2021-03-06 21:35 ` [PULL 04/27] tcg/tci: Use exec/cpu_ldst.h interfaces Richard Henderson
2021-03-06 21:35 ` [PULL 05/27] tcg: Split out tcg_raise_tb_overflow Richard Henderson
2021-03-06 21:35 ` [PULL 06/27] tcg: Manage splitwx in tc_ptr_to_region_tree by hand Richard Henderson
2021-03-06 21:35 ` [PULL 07/27] tcg/tci: Merge identical cases in generation (arithmetic opcodes) Richard Henderson
2021-03-06 21:35 ` [PULL 08/27] tcg/tci: Merge identical cases in generation (exchange opcodes) Richard Henderson
2021-03-06 21:35 ` [PULL 09/27] tcg/tci: Merge identical cases in generation (deposit opcode) Richard Henderson
2021-03-06 21:35 ` [PULL 10/27] tcg/tci: Merge identical cases in generation (conditional opcodes) Richard Henderson
2021-03-06 21:35 ` Richard Henderson [this message]
2021-03-06 21:35 ` [PULL 12/27] tcg/tci: Remove tci_read_r8 Richard Henderson
2021-03-06 21:35 ` [PULL 13/27] tcg/tci: Remove tci_read_r8s Richard Henderson
2021-03-06 21:36 ` [PULL 14/27] tcg/tci: Remove tci_read_r16 Richard Henderson
2021-03-06 21:36 ` [PULL 15/27] tcg/tci: Remove tci_read_r16s Richard Henderson
2021-03-06 21:36 ` [PULL 16/27] tcg/tci: Remove tci_read_r32 Richard Henderson
2021-03-06 21:36 ` [PULL 17/27] tcg/tci: Remove tci_read_r32s Richard Henderson
2021-03-06 21:36 ` [PULL 18/27] tcg/tci: Reduce use of tci_read_r64 Richard Henderson
2021-03-06 21:36 ` [PULL 19/27] tcg/tci: Merge basic arithmetic operations Richard Henderson
2021-03-06 21:36 ` [PULL 20/27] tcg/tci: Merge extension operations Richard Henderson
2021-03-06 21:36 ` [PULL 21/27] tcg/tci: Merge bswap operations Richard Henderson
2021-03-06 21:36 ` [PULL 22/27] tcg/tci: Merge mov, not and neg operations Richard Henderson
2021-03-06 21:36 ` [PULL 23/27] accel/tcg: rename tb_lookup__cpu_state and hoist state extraction Richard Henderson
2021-03-06 21:36 ` [PULL 24/27] accel/tcg: move CF_CLUSTER calculation to curr_cflags Richard Henderson
2021-03-06 21:36 ` [PULL 25/27] accel/tcg: drop the use of CF_HASH_MASK and rename params Richard Henderson
2021-03-06 21:36 ` [PULL 26/27] include/exec: lightly re-arrange TranslationBlock Richard Henderson
2021-03-06 21:36 ` [PULL 27/27] accel/tcg: Precompute curr_cflags into cpu->tcg_cflags Richard Henderson
2021-03-09 11:21 ` [PULL 00/27] tcg patch queue Peter Maydell
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