From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Alex Bennée" <alex.bennee@linaro.org>
Subject: [PULL 26/27] include/exec: lightly re-arrange TranslationBlock
Date: Sat, 6 Mar 2021 13:36:12 -0800 [thread overview]
Message-ID: <20210306213613.85168-27-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210306213613.85168-1-richard.henderson@linaro.org>
From: Alex Bennée <alex.bennee@linaro.org>
Lets make sure all the flags we compare when looking up blocks are
together in the same place.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210224165811.11567-5-alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/exec-all.h | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index acf66ab692..a262dd5804 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -448,9 +448,6 @@ struct TranslationBlock {
target_ulong pc; /* simulated PC corresponding to this block (EIP + CS base) */
target_ulong cs_base; /* CS base for this block */
uint32_t flags; /* flags defining in which context the code was generated */
- uint16_t size; /* size of target code for this block (1 <=
- size <= TARGET_PAGE_SIZE) */
- uint16_t icount;
uint32_t cflags; /* compile flags */
#define CF_COUNT_MASK 0x00007fff
#define CF_LAST_IO 0x00008000 /* Last insn may be an IO access. */
@@ -464,6 +461,14 @@ struct TranslationBlock {
/* Per-vCPU dynamic tracing state used to generate this TB */
uint32_t trace_vcpu_dstate;
+ /*
+ * Above fields used for comparing
+ */
+
+ /* size of target code for this block (1 <= size <= TARGET_PAGE_SIZE) */
+ uint16_t size;
+ uint16_t icount;
+
struct tb_tc tc;
/* first and second physical page containing code. The lower bit
--
2.25.1
next prev parent reply other threads:[~2021-03-06 21:51 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-06 21:35 [PULL 00/27] tcg patch queue Richard Henderson
2021-03-06 21:35 ` [PULL 01/27] tcg/aarch64: Fix constant subtraction in tcg_out_addsub2 Richard Henderson
2021-03-06 21:35 ` [PULL 02/27] tcg/aarch64: Fix I3617_CMLE0 Richard Henderson
2021-03-06 21:35 ` [PULL 03/27] tcg/aarch64: Fix generation of "scalar" vector operations Richard Henderson
2021-03-06 21:35 ` [PULL 04/27] tcg/tci: Use exec/cpu_ldst.h interfaces Richard Henderson
2021-03-06 21:35 ` [PULL 05/27] tcg: Split out tcg_raise_tb_overflow Richard Henderson
2021-03-06 21:35 ` [PULL 06/27] tcg: Manage splitwx in tc_ptr_to_region_tree by hand Richard Henderson
2021-03-06 21:35 ` [PULL 07/27] tcg/tci: Merge identical cases in generation (arithmetic opcodes) Richard Henderson
2021-03-06 21:35 ` [PULL 08/27] tcg/tci: Merge identical cases in generation (exchange opcodes) Richard Henderson
2021-03-06 21:35 ` [PULL 09/27] tcg/tci: Merge identical cases in generation (deposit opcode) Richard Henderson
2021-03-06 21:35 ` [PULL 10/27] tcg/tci: Merge identical cases in generation (conditional opcodes) Richard Henderson
2021-03-06 21:35 ` [PULL 11/27] tcg/tci: Merge identical cases in generation (load/store opcodes) Richard Henderson
2021-03-06 21:35 ` [PULL 12/27] tcg/tci: Remove tci_read_r8 Richard Henderson
2021-03-06 21:35 ` [PULL 13/27] tcg/tci: Remove tci_read_r8s Richard Henderson
2021-03-06 21:36 ` [PULL 14/27] tcg/tci: Remove tci_read_r16 Richard Henderson
2021-03-06 21:36 ` [PULL 15/27] tcg/tci: Remove tci_read_r16s Richard Henderson
2021-03-06 21:36 ` [PULL 16/27] tcg/tci: Remove tci_read_r32 Richard Henderson
2021-03-06 21:36 ` [PULL 17/27] tcg/tci: Remove tci_read_r32s Richard Henderson
2021-03-06 21:36 ` [PULL 18/27] tcg/tci: Reduce use of tci_read_r64 Richard Henderson
2021-03-06 21:36 ` [PULL 19/27] tcg/tci: Merge basic arithmetic operations Richard Henderson
2021-03-06 21:36 ` [PULL 20/27] tcg/tci: Merge extension operations Richard Henderson
2021-03-06 21:36 ` [PULL 21/27] tcg/tci: Merge bswap operations Richard Henderson
2021-03-06 21:36 ` [PULL 22/27] tcg/tci: Merge mov, not and neg operations Richard Henderson
2021-03-06 21:36 ` [PULL 23/27] accel/tcg: rename tb_lookup__cpu_state and hoist state extraction Richard Henderson
2021-03-06 21:36 ` [PULL 24/27] accel/tcg: move CF_CLUSTER calculation to curr_cflags Richard Henderson
2021-03-06 21:36 ` [PULL 25/27] accel/tcg: drop the use of CF_HASH_MASK and rename params Richard Henderson
2021-03-06 21:36 ` Richard Henderson [this message]
2021-03-06 21:36 ` [PULL 27/27] accel/tcg: Precompute curr_cflags into cpu->tcg_cflags Richard Henderson
2021-03-09 11:21 ` [PULL 00/27] tcg patch queue Peter Maydell
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