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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 24/54] hw/arm/armsse: Move dual-timer device into data-driven framework
Date: Mon,  8 Mar 2021 17:32:14 +0000	[thread overview]
Message-ID: <20210308173244.20710-25-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210308173244.20710-1-peter.maydell@linaro.org>

Move the CMSDK dualtimer device handling into the data-driven
device placement framework.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-25-peter.maydell@linaro.org
---
 hw/arm/armsse.c | 35 +++++++++++++++++++++--------------
 1 file changed, 21 insertions(+), 14 deletions(-)

diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index 22dd437a4ba..f8da7fb00f9 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -105,6 +105,15 @@ static const ARMSSEDeviceInfo sse200_devices[] = {
         .ppc_port = 1,
         .irq = 4,
     },
+    {
+        .name = "dualtimer",
+        .type = TYPE_CMSDK_APB_DUALTIMER,
+        .index = 0,
+        .addr = 0x40002000,
+        .ppc = 0,
+        .ppc_port = 2,
+        .irq = 5,
+    },
     {
         .name = NULL,
     }
@@ -346,6 +355,10 @@ static void armsse_init(Object *obj)
             object_initialize_child(obj, devinfo->name,
                                     &s->timer[devinfo->index],
                                     TYPE_CMSDK_APB_TIMER);
+        } else if (!strcmp(devinfo->type, TYPE_CMSDK_APB_DUALTIMER)) {
+            assert(devinfo->index == 0);
+            object_initialize_child(obj, devinfo->name, &s->dualtimer,
+                                    TYPE_CMSDK_APB_DUALTIMER);
         } else {
             g_assert_not_reached();
         }
@@ -375,8 +388,6 @@ static void armsse_init(Object *obj)
     }
     object_initialize_child(obj, "s32ktimer", &s->s32ktimer,
                             TYPE_CMSDK_APB_TIMER);
-    object_initialize_child(obj, "dualtimer", &s->dualtimer,
-                            TYPE_CMSDK_APB_DUALTIMER);
     object_initialize_child(obj, "s32kwatchdog", &s->s32kwatchdog,
                             TYPE_CMSDK_APB_WATCHDOG);
     object_initialize_child(obj, "nswatchdog", &s->nswatchdog,
@@ -808,6 +819,14 @@ static void armsse_realize(DeviceState *dev, Error **errp)
                 return;
             }
             mr = sysbus_mmio_get_region(sbd, 0);
+        } else if (!strcmp(devinfo->type, TYPE_CMSDK_APB_DUALTIMER)) {
+            sbd = SYS_BUS_DEVICE(&s->dualtimer);
+
+            qdev_connect_clock_in(DEVICE(sbd), "TIMCLK", s->mainclk);
+            if (!sysbus_realize(sbd, errp)) {
+                return;
+            }
+            mr = sysbus_mmio_get_region(sbd, 0);
         } else {
             g_assert_not_reached();
         }
@@ -844,16 +863,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
         }
     }
 
-    qdev_connect_clock_in(DEVICE(&s->dualtimer), "TIMCLK", s->mainclk);
-    if (!sysbus_realize(SYS_BUS_DEVICE(&s->dualtimer), errp)) {
-        return;
-    }
-    sysbus_connect_irq(SYS_BUS_DEVICE(&s->dualtimer), 0,
-                       armsse_get_common_irq_in(s, 5));
-    mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dualtimer), 0);
-    object_property_set_link(OBJECT(&s->apb_ppc[0]), "port[2]", OBJECT(mr),
-                             &error_abort);
-
     if (info->has_mhus) {
         /*
          * An SSE-200 with only one CPU should have only one MHU created,
@@ -901,8 +910,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
     sbd_apb_ppc0 = SYS_BUS_DEVICE(&s->apb_ppc[0]);
     dev_apb_ppc0 = DEVICE(&s->apb_ppc[0]);
 
-    mr = sysbus_mmio_get_region(sbd_apb_ppc0, 2);
-    memory_region_add_subregion(&s->container, 0x40002000, mr);
     if (info->has_mhus) {
         mr = sysbus_mmio_get_region(sbd_apb_ppc0, 3);
         memory_region_add_subregion(&s->container, 0x40003000, mr);
-- 
2.20.1



  parent reply	other threads:[~2021-03-08 18:08 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-08 17:31 [PULL 00/54] target-arm queue Peter Maydell
2021-03-08 17:31 ` [PULL 01/54] clock: Add ClockEvent parameter to callbacks Peter Maydell
2021-03-08 17:31 ` [PULL 02/54] clock: Add ClockPreUpdate callback event type Peter Maydell
2021-03-08 17:31 ` [PULL 03/54] clock: Add clock_ns_to_ticks() function Peter Maydell
2021-03-08 17:31 ` [PULL 04/54] hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks() Peter Maydell
2021-03-08 17:31 ` [PULL 05/54] hw/arm/armsse: Introduce SSE subsystem version property Peter Maydell
2021-03-08 17:31 ` [PULL 06/54] hw/misc/iotkit-sysctl: Remove is_sse200 flag Peter Maydell
2021-03-08 17:31 ` [PULL 07/54] hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values Peter Maydell
2021-03-08 17:31 ` [PULL 08/54] hw/misc/iotkit-sysinfo.c: " Peter Maydell
2021-03-08 17:31 ` [PULL 09/54] hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300 Peter Maydell
2021-03-08 17:32 ` [PULL 10/54] hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR Peter Maydell
2021-03-08 17:32 ` [PULL 11/54] hw/timer/sse-counter: Model the SSE Subsystem System Counter Peter Maydell
2021-03-08 17:32 ` [PULL 12/54] hw/timer/sse-timer: Model the SSE Subsystem System Timer Peter Maydell
2021-03-08 17:32 ` [PULL 13/54] hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour Peter Maydell
2021-03-08 17:32 ` [PULL 14/54] hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300 Peter Maydell
2021-03-08 17:32 ` [PULL 15/54] hw/misc/iotkit-sysctl: Handle INITSVTOR* " Peter Maydell
2021-03-08 17:32 ` [PULL 16/54] hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL register Peter Maydell
2021-03-08 17:32 ` [PULL 17/54] hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers Peter Maydell
2021-03-08 17:32 ` [PULL 18/54] hw/misc/iotkit-sysctl: Implement SSE-200 and SSE-300 PID register values Peter Maydell
2021-03-08 17:32 ` [PULL 19/54] hw/arm/Kconfig: Move ARMSSE_CPUID and ARMSSE_MHU stanzas to hw/misc Peter Maydell
2021-03-08 17:32 ` [PULL 20/54] hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block Peter Maydell
2021-03-08 17:32 ` [PULL 21/54] hw/arm/armsse: Use an array for apb_ppc fields in the state structure Peter Maydell
2021-03-08 17:32 ` [PULL 22/54] hw/arm/armsse: Add a define for number of IRQs used by the SSE itself Peter Maydell
2021-03-08 17:32 ` [PULL 23/54] hw/arm/armsse: Add framework for data-driven device placement Peter Maydell
2021-03-08 17:32 ` Peter Maydell [this message]
2021-03-08 17:32 ` [PULL 25/54] hw/arm/armsse: Move watchdogs into data-driven framework Peter Maydell
2021-03-08 17:32 ` [PULL 26/54] hw/arm/armsse: Move s32ktimer " Peter Maydell
2021-03-08 17:32 ` [PULL 27/54] hw/arm/armsse: Move sysinfo register block " Peter Maydell
2021-03-08 17:32 ` [PULL 28/54] hw/arm/armsse: Move sysctl " Peter Maydell
2021-03-08 17:32 ` [PULL 29/54] hw/arm/armsse: Move PPUs " Peter Maydell
2021-03-08 17:32 ` [PULL 30/54] hw/arm/armsse: Add missing SSE-200 SYS_PPU Peter Maydell
2021-03-08 17:32 ` [PULL 31/54] hw/arm/armsse: Indirect irq_is_common[] through ARMSSEInfo Peter Maydell
2021-03-08 17:32 ` [PULL 32/54] hw/arm/armsse: Add support for SSE variants with a system counter Peter Maydell
2021-03-08 17:32 ` [PULL 33/54] hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfo Peter Maydell
2021-03-08 17:32 ` [PULL 34/54] hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block Peter Maydell
2021-03-08 17:32 ` [PULL 35/54] hw/arm/armsse: Add SSE-300 support Peter Maydell
2021-03-08 17:32 ` [PULL 36/54] hw/arm/mps2-tz: Make UART overflow IRQ board-specific Peter Maydell
2021-03-08 17:32 ` [PULL 37/54] hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate Peter Maydell
2021-03-08 17:32 ` [PULL 38/54] hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register Peter Maydell
2021-03-08 17:32 ` [PULL 39/54] hw/misc/mps2-scc: Implement changes for AN547 Peter Maydell
2021-03-08 17:32 ` [PULL 40/54] hw/arm/mps2-tz: Support running APB peripherals on different clock Peter Maydell
2021-03-08 17:32 ` [PULL 41/54] hw/arm/mps2-tz: Make initsvtor0 setting board-specific Peter Maydell
2021-03-08 17:32 ` [PULL 42/54] hw/arm/mps2-tz: Add new mps3-an547 board Peter Maydell
2021-03-08 17:32 ` [PULL 43/54] docs/system/arm/mps2.rst: Document the " Peter Maydell
2021-03-08 17:32 ` [PULL 44/54] tests/qtest/sse-timer-test: Add simple test of the SSE counter Peter Maydell
2021-03-08 17:32 ` [PULL 45/54] tests/qtest/sse-timer-test: Test the system timer Peter Maydell
2021-03-08 17:32 ` [PULL 46/54] tests/qtest/sse-timer-test: Test counter scaling changes Peter Maydell
2021-03-08 17:32 ` [PULL 47/54] target/arm: Restrict v7A TCG cpus to TCG accel Peter Maydell
2021-03-08 17:32 ` [PULL 48/54] hw/dma: Implement a Xilinx CSU DMA model Peter Maydell
2021-03-08 17:32 ` [PULL 49/54] hw/arm: xlnx-zynqmp: Clean up coding convention issues Peter Maydell
2021-03-08 17:32 ` [PULL 50/54] hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI Peter Maydell
2021-03-08 17:32 ` [PULL 51/54] hw/ssi: xilinx_spips: Clean up coding convention issues Peter Maydell
2021-03-08 17:32 ` [PULL 52/54] hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips Peter Maydell
2021-03-08 17:32 ` [PULL 53/54] hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_ Peter Maydell
2021-03-08 17:32 ` [PULL 54/54] hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() Peter Maydell
2021-03-08 18:49 ` [PULL 00/54] target-arm queue no-reply

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