From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 08/54] hw/misc/iotkit-sysinfo.c: Implement SSE-300 PID register values
Date: Mon, 8 Mar 2021 17:31:58 +0000 [thread overview]
Message-ID: <20210308173244.20710-9-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210308173244.20710-1-peter.maydell@linaro.org>
The version of the SYSINFO Register Block in the SSE-300 has
different CIDR/PIDR register values to the SSE-200; pass in
the sse-version property and use it to select the correct
ID register values.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-9-peter.maydell@linaro.org
---
include/hw/misc/iotkit-sysinfo.h | 1 +
hw/arm/armsse.c | 2 ++
hw/misc/iotkit-sysinfo.c | 29 +++++++++++++++++++++++++++--
3 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/include/hw/misc/iotkit-sysinfo.h b/include/hw/misc/iotkit-sysinfo.h
index 055771d2098..91bd14bdbff 100644
--- a/include/hw/misc/iotkit-sysinfo.h
+++ b/include/hw/misc/iotkit-sysinfo.h
@@ -38,6 +38,7 @@ struct IoTKitSysInfo {
/* Properties */
uint32_t sys_version;
uint32_t sys_config;
+ uint32_t sse_version;
};
#endif
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index 9632c287351..67fa4ffe34a 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -951,6 +951,8 @@ static void armsse_realize(DeviceState *dev, Error **errp)
armsse_sys_config_value(s, info), errp)) {
return;
}
+ object_property_set_int(OBJECT(&s->sysinfo), "sse-version",
+ info->sse_version, &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sysinfo), errp)) {
return;
}
diff --git a/hw/misc/iotkit-sysinfo.c b/hw/misc/iotkit-sysinfo.c
index 52e70053df7..4bd3fd4c8f3 100644
--- a/hw/misc/iotkit-sysinfo.c
+++ b/hw/misc/iotkit-sysinfo.c
@@ -26,6 +26,7 @@
#include "hw/registerfields.h"
#include "hw/misc/iotkit-sysinfo.h"
#include "hw/qdev-properties.h"
+#include "hw/arm/armsse-version.h"
REG32(SYS_VERSION, 0x0)
REG32(SYS_CONFIG, 0x4)
@@ -49,6 +50,12 @@ static const int sysinfo_id[] = {
0x0d, 0xf0, 0x05, 0xb1, /* CID0..CID3 */
};
+static const int sysinfo_sse300_id[] = {
+ 0x04, 0x00, 0x00, 0x00, /* PID4..PID7 */
+ 0x58, 0xb8, 0x1b, 0x00, /* PID0..PID3 */
+ 0x0d, 0xf0, 0x05, 0xb1, /* CID0..CID3 */
+};
+
static uint64_t iotkit_sysinfo_read(void *opaque, hwaddr offset,
unsigned size)
{
@@ -64,7 +71,14 @@ static uint64_t iotkit_sysinfo_read(void *opaque, hwaddr offset,
r = s->sys_config;
break;
case A_PID4 ... A_CID3:
- r = sysinfo_id[(offset - A_PID4) / 4];
+ switch (s->sse_version) {
+ case ARMSSE_SSE300:
+ r = sysinfo_sse300_id[(offset - A_PID4) / 4];
+ break;
+ default:
+ r = sysinfo_id[(offset - A_PID4) / 4];
+ break;
+ }
break;
default:
qemu_log_mask(LOG_GUEST_ERROR,
@@ -99,6 +113,7 @@ static const MemoryRegionOps iotkit_sysinfo_ops = {
static Property iotkit_sysinfo_props[] = {
DEFINE_PROP_UINT32("SYS_VERSION", IoTKitSysInfo, sys_version, 0),
DEFINE_PROP_UINT32("SYS_CONFIG", IoTKitSysInfo, sys_config, 0),
+ DEFINE_PROP_UINT32("sse-version", IoTKitSysInfo, sse_version, 0),
DEFINE_PROP_END_OF_LIST()
};
@@ -112,6 +127,16 @@ static void iotkit_sysinfo_init(Object *obj)
sysbus_init_mmio(sbd, &s->iomem);
}
+static void iotkit_sysinfo_realize(DeviceState *dev, Error **errp)
+{
+ IoTKitSysInfo *s = IOTKIT_SYSINFO(dev);
+
+ if (!armsse_version_valid(s->sse_version)) {
+ error_setg(errp, "invalid sse-version value %d", s->sse_version);
+ return;
+ }
+}
+
static void iotkit_sysinfo_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -120,7 +145,7 @@ static void iotkit_sysinfo_class_init(ObjectClass *klass, void *data)
* This device has no guest-modifiable state and so it
* does not need a reset function or VMState.
*/
-
+ dc->realize = iotkit_sysinfo_realize;
device_class_set_props(dc, iotkit_sysinfo_props);
}
--
2.20.1
next prev parent reply other threads:[~2021-03-08 17:56 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-08 17:31 [PULL 00/54] target-arm queue Peter Maydell
2021-03-08 17:31 ` [PULL 01/54] clock: Add ClockEvent parameter to callbacks Peter Maydell
2021-03-08 17:31 ` [PULL 02/54] clock: Add ClockPreUpdate callback event type Peter Maydell
2021-03-08 17:31 ` [PULL 03/54] clock: Add clock_ns_to_ticks() function Peter Maydell
2021-03-08 17:31 ` [PULL 04/54] hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks() Peter Maydell
2021-03-08 17:31 ` [PULL 05/54] hw/arm/armsse: Introduce SSE subsystem version property Peter Maydell
2021-03-08 17:31 ` [PULL 06/54] hw/misc/iotkit-sysctl: Remove is_sse200 flag Peter Maydell
2021-03-08 17:31 ` [PULL 07/54] hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values Peter Maydell
2021-03-08 17:31 ` Peter Maydell [this message]
2021-03-08 17:31 ` [PULL 09/54] hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300 Peter Maydell
2021-03-08 17:32 ` [PULL 10/54] hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR Peter Maydell
2021-03-08 17:32 ` [PULL 11/54] hw/timer/sse-counter: Model the SSE Subsystem System Counter Peter Maydell
2021-03-08 17:32 ` [PULL 12/54] hw/timer/sse-timer: Model the SSE Subsystem System Timer Peter Maydell
2021-03-08 17:32 ` [PULL 13/54] hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour Peter Maydell
2021-03-08 17:32 ` [PULL 14/54] hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300 Peter Maydell
2021-03-08 17:32 ` [PULL 15/54] hw/misc/iotkit-sysctl: Handle INITSVTOR* " Peter Maydell
2021-03-08 17:32 ` [PULL 16/54] hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL register Peter Maydell
2021-03-08 17:32 ` [PULL 17/54] hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers Peter Maydell
2021-03-08 17:32 ` [PULL 18/54] hw/misc/iotkit-sysctl: Implement SSE-200 and SSE-300 PID register values Peter Maydell
2021-03-08 17:32 ` [PULL 19/54] hw/arm/Kconfig: Move ARMSSE_CPUID and ARMSSE_MHU stanzas to hw/misc Peter Maydell
2021-03-08 17:32 ` [PULL 20/54] hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block Peter Maydell
2021-03-08 17:32 ` [PULL 21/54] hw/arm/armsse: Use an array for apb_ppc fields in the state structure Peter Maydell
2021-03-08 17:32 ` [PULL 22/54] hw/arm/armsse: Add a define for number of IRQs used by the SSE itself Peter Maydell
2021-03-08 17:32 ` [PULL 23/54] hw/arm/armsse: Add framework for data-driven device placement Peter Maydell
2021-03-08 17:32 ` [PULL 24/54] hw/arm/armsse: Move dual-timer device into data-driven framework Peter Maydell
2021-03-08 17:32 ` [PULL 25/54] hw/arm/armsse: Move watchdogs " Peter Maydell
2021-03-08 17:32 ` [PULL 26/54] hw/arm/armsse: Move s32ktimer " Peter Maydell
2021-03-08 17:32 ` [PULL 27/54] hw/arm/armsse: Move sysinfo register block " Peter Maydell
2021-03-08 17:32 ` [PULL 28/54] hw/arm/armsse: Move sysctl " Peter Maydell
2021-03-08 17:32 ` [PULL 29/54] hw/arm/armsse: Move PPUs " Peter Maydell
2021-03-08 17:32 ` [PULL 30/54] hw/arm/armsse: Add missing SSE-200 SYS_PPU Peter Maydell
2021-03-08 17:32 ` [PULL 31/54] hw/arm/armsse: Indirect irq_is_common[] through ARMSSEInfo Peter Maydell
2021-03-08 17:32 ` [PULL 32/54] hw/arm/armsse: Add support for SSE variants with a system counter Peter Maydell
2021-03-08 17:32 ` [PULL 33/54] hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfo Peter Maydell
2021-03-08 17:32 ` [PULL 34/54] hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block Peter Maydell
2021-03-08 17:32 ` [PULL 35/54] hw/arm/armsse: Add SSE-300 support Peter Maydell
2021-03-08 17:32 ` [PULL 36/54] hw/arm/mps2-tz: Make UART overflow IRQ board-specific Peter Maydell
2021-03-08 17:32 ` [PULL 37/54] hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate Peter Maydell
2021-03-08 17:32 ` [PULL 38/54] hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register Peter Maydell
2021-03-08 17:32 ` [PULL 39/54] hw/misc/mps2-scc: Implement changes for AN547 Peter Maydell
2021-03-08 17:32 ` [PULL 40/54] hw/arm/mps2-tz: Support running APB peripherals on different clock Peter Maydell
2021-03-08 17:32 ` [PULL 41/54] hw/arm/mps2-tz: Make initsvtor0 setting board-specific Peter Maydell
2021-03-08 17:32 ` [PULL 42/54] hw/arm/mps2-tz: Add new mps3-an547 board Peter Maydell
2021-03-08 17:32 ` [PULL 43/54] docs/system/arm/mps2.rst: Document the " Peter Maydell
2021-03-08 17:32 ` [PULL 44/54] tests/qtest/sse-timer-test: Add simple test of the SSE counter Peter Maydell
2021-03-08 17:32 ` [PULL 45/54] tests/qtest/sse-timer-test: Test the system timer Peter Maydell
2021-03-08 17:32 ` [PULL 46/54] tests/qtest/sse-timer-test: Test counter scaling changes Peter Maydell
2021-03-08 17:32 ` [PULL 47/54] target/arm: Restrict v7A TCG cpus to TCG accel Peter Maydell
2021-03-08 17:32 ` [PULL 48/54] hw/dma: Implement a Xilinx CSU DMA model Peter Maydell
2021-03-08 17:32 ` [PULL 49/54] hw/arm: xlnx-zynqmp: Clean up coding convention issues Peter Maydell
2021-03-08 17:32 ` [PULL 50/54] hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI Peter Maydell
2021-03-08 17:32 ` [PULL 51/54] hw/ssi: xilinx_spips: Clean up coding convention issues Peter Maydell
2021-03-08 17:32 ` [PULL 52/54] hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips Peter Maydell
2021-03-08 17:32 ` [PULL 53/54] hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_ Peter Maydell
2021-03-08 17:32 ` [PULL 54/54] hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() Peter Maydell
2021-03-08 18:49 ` [PULL 00/54] target-arm queue no-reply
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