[PATCH v3 0/7] Some vIOMMU fixes

[Eric Auger <eric.auger@redhat.com>]

Hi,

Here is a set of vIOMMU fixes:

SMMUv3:
- top SID computation overflow when handling SMMU_CMD_CFGI_ALL
- internal IOTLB handling (changes related to range invalidation)
  - smmu_iotlb_inv_iova with asid = -1
  - non power of 2 invalidation range handling.

VIRTIO-IOMMU:
  - non power of 2 invalidation range handling.

Best Regards

Eric

v3: https://github.com/eauger/qemu/tree/viommu_fixes_for_6-v3
v2: https://github.com/eauger/qemu/tree/viommu_fixes_for_6-v2

History:
v2 -> v3:
- Collected R-b's
- Added doc-comment for dma_aligned_pow2_mask()
- Up to now I have kept a single TTL check to avoid the
  remove-by-key path in smmu_iotlb_inv_iova (not checking TG)

v1 -> v2:
- new:
  - dma: Introduce dma_aligned_pow2_mask()
  - intel_iommu: Fix mask may be uninitialized in vtd_context_device_invalidate
  - hw/arm/smmuv3: Uniformize sid traces

Eric Auger (7):
  intel_iommu: Fix mask may be uninitialized in
    vtd_context_device_invalidate
  dma: Introduce dma_aligned_pow2_mask()
  virtio-iommu: Handle non power of 2 range invalidations
  hw/arm/smmu-common: Fix smmu_iotlb_inv_iova when asid is not set
  hw/arm/smmuv3: Enforce invalidation on a power of two range
  hw/arm/smmuv3: Fix SMMU_CMD_CFGI_STE_RANGE handling
  hw/arm/smmuv3: Uniformize sid traces

 hw/arm/smmu-common.c     | 32 +++++++++++++---------
 hw/arm/smmu-internal.h   |  5 ++++
 hw/arm/smmuv3.c          | 58 +++++++++++++++++++++++++++-------------
 hw/arm/trace-events      | 24 ++++++++---------
 hw/i386/intel_iommu.c    | 32 +++++++---------------
 hw/virtio/virtio-iommu.c | 19 ++++++++++---
 include/sysemu/dma.h     | 12 +++++++++
 softmmu/dma-helpers.c    | 26 ++++++++++++++++++
 8 files changed, 139 insertions(+), 69 deletions(-)

-- 
2.26.2