From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
peter.maydell@linaro.org, mst@redhat.com,
jean-philippe@linaro.org, peterx@redhat.com, jasowang@redhat.com,
pbonzini@redhat.com
Cc: vivek.gautam@arm.com, shameerali.kolothum.thodi@huawei.com
Subject: [PATCH v3 5/7] hw/arm/smmuv3: Enforce invalidation on a power of two range
Date: Tue, 9 Mar 2021 11:27:40 +0100 [thread overview]
Message-ID: <20210309102742.30442-6-eric.auger@redhat.com> (raw)
In-Reply-To: <20210309102742.30442-1-eric.auger@redhat.com>
As of today, the driver can invalidate a number of pages that is
not a power of 2. However IOTLB unmap notifications and internal
IOTLB invalidations work with masks leading to erroneous
invalidations.
In case the range is not a power of 2, split invalidations into
power of 2 invalidations.
When looking for a single page entry in the vSMMU internal IOTLB,
let's make sure that if the entry is not found using a
g_hash_table_remove() we iterate over all the entries to find a
potential range that overlaps it.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
hw/arm/smmu-common.c | 30 ++++++++++++++++++------------
hw/arm/smmuv3.c | 24 ++++++++++++++++++++----
2 files changed, 38 insertions(+), 16 deletions(-)
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index e9ca3aebb2..84d2c62c26 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -151,22 +151,28 @@ inline void
smmu_iotlb_inv_iova(SMMUState *s, int asid, dma_addr_t iova,
uint8_t tg, uint64_t num_pages, uint8_t ttl)
{
+ /* if tg is not set we use 4KB range invalidation */
+ uint8_t granule = tg ? tg * 2 + 10 : 12;
+
if (ttl && (num_pages == 1) && (asid >= 0)) {
SMMUIOTLBKey key = smmu_get_iotlb_key(asid, iova, tg, ttl);
- g_hash_table_remove(s->iotlb, &key);
- } else {
- /* if tg is not set we use 4KB range invalidation */
- uint8_t granule = tg ? tg * 2 + 10 : 12;
-
- SMMUIOTLBPageInvInfo info = {
- .asid = asid, .iova = iova,
- .mask = (num_pages * 1 << granule) - 1};
-
- g_hash_table_foreach_remove(s->iotlb,
- smmu_hash_remove_by_asid_iova,
- &info);
+ if (g_hash_table_remove(s->iotlb, &key)) {
+ return;
+ }
+ /*
+ * if the entry is not found, let's see if it does not
+ * belong to a larger IOTLB entry
+ */
}
+
+ SMMUIOTLBPageInvInfo info = {
+ .asid = asid, .iova = iova,
+ .mask = (num_pages * 1 << granule) - 1};
+
+ g_hash_table_foreach_remove(s->iotlb,
+ smmu_hash_remove_by_asid_iova,
+ &info);
}
inline void smmu_iotlb_inv_asid(SMMUState *s, uint16_t asid)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index bd1f97000d..fdd6332ce5 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -861,7 +861,8 @@ static void smmuv3_s1_range_inval(SMMUState *s, Cmd *cmd)
uint16_t vmid = CMD_VMID(cmd);
bool leaf = CMD_LEAF(cmd);
uint8_t tg = CMD_TG(cmd);
- hwaddr num_pages = 1;
+ uint64_t first_page = 0, last_page;
+ uint64_t num_pages = 1;
int asid = -1;
if (tg) {
@@ -874,9 +875,24 @@ static void smmuv3_s1_range_inval(SMMUState *s, Cmd *cmd)
if (type == SMMU_CMD_TLBI_NH_VA) {
asid = CMD_ASID(cmd);
}
- trace_smmuv3_s1_range_inval(vmid, asid, addr, tg, num_pages, ttl, leaf);
- smmuv3_inv_notifiers_iova(s, asid, addr, tg, num_pages);
- smmu_iotlb_inv_iova(s, asid, addr, tg, num_pages, ttl);
+
+ /* Split invalidations into ^2 range invalidations */
+ last_page = num_pages - 1;
+ while (num_pages) {
+ uint8_t granule = tg * 2 + 10;
+ uint64_t mask, count;
+
+ mask = dma_aligned_pow2_mask(first_page, last_page, 64 - granule);
+ count = mask + 1;
+
+ trace_smmuv3_s1_range_inval(vmid, asid, addr, tg, count, ttl, leaf);
+ smmuv3_inv_notifiers_iova(s, asid, addr, tg, count);
+ smmu_iotlb_inv_iova(s, asid, addr, tg, count, ttl);
+
+ num_pages -= count;
+ first_page += count;
+ addr += count * BIT_ULL(granule);
+ }
}
static int smmuv3_cmdq_consume(SMMUv3State *s)
--
2.26.2
next prev parent reply other threads:[~2021-03-09 10:31 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-09 10:27 [PATCH v3 0/7] Some vIOMMU fixes Eric Auger
2021-03-09 10:27 ` [PATCH v3 1/7] intel_iommu: Fix mask may be uninitialized in vtd_context_device_invalidate Eric Auger
2021-03-09 10:27 ` [PATCH v3 2/7] dma: Introduce dma_aligned_pow2_mask() Eric Auger
2021-03-09 16:28 ` Peter Xu
2021-03-09 10:27 ` [PATCH v3 3/7] virtio-iommu: Handle non power of 2 range invalidations Eric Auger
2021-03-09 10:27 ` [PATCH v3 4/7] hw/arm/smmu-common: Fix smmu_iotlb_inv_iova when asid is not set Eric Auger
2021-03-09 10:27 ` Eric Auger [this message]
2021-03-09 10:27 ` [PATCH v3 6/7] hw/arm/smmuv3: Fix SMMU_CMD_CFGI_STE_RANGE handling Eric Auger
2021-03-25 14:18 ` Zenghui Yu
2021-03-25 15:09 ` Auger Eric
2021-03-26 2:23 ` Zenghui Yu
2021-03-09 10:27 ` [PATCH v3 7/7] hw/arm/smmuv3: Uniformize sid traces Eric Auger
2021-03-11 13:22 ` [PATCH v3 0/7] Some vIOMMU fixes Peter Maydell
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